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MIC2085 Datasheet, PDF (14/29 Pages) Micrel Semiconductor – Single Channel Hot Swap Controllers
Micrel, Inc.
Functional Description
Hot Swap Insertion
When circuit boards are inserted into live system
backplanes and supply voltages, high inrush currents
can result due to the charging of bulk capacitance that
resides across the supply pins of the circuit board. This
inrush current, although transient in nature, may be high
enough to cause permanent damage to on-board
components or may cause the system’s supply voltages
to go out of regulation during the transient period which
may result in system failures. The MIC2085/86 acts as a
controller for external N-Channel MOSFET devices in
which the gate drive is controlled to provide inrush
current limiting and output voltage slew rate control
during hot plug insertions.
Power Supply
VCC is the supply input to the MIC2085/86 controller
with a voltage range of 2.3V to 16.5V. The VCC input
can with stand transient spikes up to 33V. In order to
help suppress transients and ensure stability of the
supply voltage, a capacitor of 1.0µF to 10µF from VCC
to ground is recommended. Alternatively, a low pass
filter, shown in the typical application circuit, can be used
to eliminate high frequency oscillations as well as help
suppress transient spikes.
Start-Up Cycle
When the voltage on the ON pin rises above its
threshold of 1.24V, the MIC2085/86 first checks that its
supply (VCC) is above the UVLO threshold. If it does
check above, the device is enabled and an internal 2µA
current source begins charging capacitor CPOR to 1.24V
to initiate a start-up sequence (i.e., start-up delay times
out). Once the start-up delay (tSTART) elapses, CPOR is
pulled immediately to ground and a 15µA current source
begins charging the GATE output to drive the external
MOSFET that switches VIN to VOUT. The programmed
start-up delay is calculated using the following equation:
( ) t START
=
CPOR
×
VTH
ICPOR
≅ 0.62 × CPOR µF
(1)
where VTH, the POR delay threshold, is 1.24V, and ICPOR,
the POR timer current, is 2µA. As the GATE voltage
continues ramping toward its final value (VCC + VGS) at
a defined slew rate (See “Load Capacitance”/“Gate
Capacitance Dominated Start-Up” sections), a second
CPOR timing cycle begins if:1)/FAULT is high and
2)CFILTER is low (i.e., not an overvoltage, undervoltage
lockout, or overcurrent state).This second timing cycle,
tPOR, starts when the voltage at the FB pin exceeds its
threshold (VFB) indicating that the output voltage is valid.
The time period tPOR is equivalent to tSTART and sets the
interval for the /POR to go Low-to-High after “power is
MIC2085/2086
good” (See Figure 2 of “Timing Diagrams”). Active
current regulation is employed to limit the inrush current
transient response during start-up by regulating the load
current at the programmed current limit value (See
“Current Limiting and Dual-Level Circuit Breaker”
section). The following equation is used to determine the
nominal current limit value:
ILIM
=
VTRIPSLOW
R SENSE
= 48mV
R SENSE
(2)
where VTRIPSLOW is the current limit slow trip threshold
found in the electrical table and RSENSE is the selected
value that will set the desired current limit. There are two
basic start-up modes for the MIC2085/86: 1)Start-up
dominated by load capacitance and 2)start-up
dominated by total gate capacitance. The magnitude of
the inrush current delivered to the load will determine the
dominant mode. If the inrush current is greater than the
programmed current limit (ILIM), then load capacitance
is dominant. Otherwise, gate capacitance is dominant.
The expected inrush current may be calculated using the
following equation:
INRUSH
≅
IGATE
×
CLOAD
C GATE
≅ 15µΑ × CLOAD
C GATE
(3)
where IGATE is the GATE pin pull-up current, CLOAD is the
load capacitance, and CGATE is the total GATE
capacitance (CISS of the external MOSFET and any
external capacitor connected from the MIC2085/86
GATE pin to ground).
Load Capacitance Dominated Start-Up
In this case, the load capacitance, CLOAD, is large
enough to cause the inrush current to exceed the
programmed current limit but is less than the fast-trip
threshold (or the fast-trip threshold is disabled, ‘M’
option). During start-up under this condition, the load
current is regulated at the programmed current limit
value (ILIM) and held constant until the output voltage
rises to its final value. The output slew rate and
equivalent GATE voltage slew rate is computed by the
following equation:
Output
Voltage
Slew
Rate, dVOUT /dt
=
ILIM
CLOAD
(4)
where ILIM is the programmed current limit value.
Consequently, the value of CFILTER must be selected to
ensure that the overcurrent response time, tOCSLOW,
exceeds the time needed for the output to reach its final
value. For example, given a MOSFET with an input
capacitance CISS = CGATE =4700pF, CLOAD is 2200µF,
and ILIMIT is set to 6A with a 12Vinput, then the load
capacitance dominates as determined by the calculated
INRUSH > ILIM. Therefore, the output voltage slew rate
determined from Equation 4 is:
May 2006
14
M9999-050406
(408) 955-1690