MIC2582_09 Datasheet, PDF (13/25 Pages) Micrel Semiconductor – Single Channel Hot Swap Controllers

Micrel, Inc.
MIC2582/MIC2583
Functional Description
Hot Swap Insertion
When circuit boards are inserted into live system
backplanes and supply voltages, high inrush currents
can result due to the charging of bulk capacitance that
resides across the supply pins of the circuit board. This
inrush current, although transient in nature, may be high
enough to cause permanent damage to on board
components or may cause the system’s supply voltages
to go out of regulation during the transient period which
may result in system failures. The MIC2582 and
MIC2583 act as a controller for external N-Channel
MOSFET devices in which the gate drive is controlled to
provide inrush current limiting and output voltage slew
rate control during hot plug insertions.
Power Supply
VCC is the supply input to the MIC2582/83 controller
with a voltage range of 2.3V to 13.2V. The VCC input
can withstand transient spikes up to 20V. In order to
ensure stability of the supply voltage, a minimum 0.47µF
capacitor from VCC to ground is recommended.
Alternatively, a low pass filter, shown in the typical
application circuit (see Figure 1), can be used to
eliminate high frequency oscillations as well as help
suppress transient spikes.
Also, due to the existence of an undetermined amount of
parasitic inductance in the absence of bulk capacitance
along the supply path, placing a Zener diode at the VCC
of the controller to ground in order to provide external
supply transient protection is strongly recommended for
relatively high current applications (≥3A). See Figure 1.
Start-Up Cycle
Supply Contact Delay
During a hot insert of a PC board into a backplane or
when the supply (VCC) is powered up, as the voltage at
the ON pin rises above its threshold (1.24V typical), the
MIC2582/83 first checks that both supply voltages are
above their respective UVLO thresholds. If so, the
device is enabled and an internal 2.5µA current source
begins charging capacitor C_POR to 0.3V to initiate a start-
up sequence. Once the start-up delay (t_START) elapses,
the CPOR pin is pulled immediately to ground and a
17µA current source begins charging the GATE output
to drive the external MOSFET that switches V_IN to V_OUT.
The programmed contact start-up delay is calculated
using the following equation:
( ) t_START
=
C_POR
⎢⎣⎡^VISCTPAORRT
⎤
⎥
⎦
≅
0.12 x C_POR
μF
(1)
Where the start-up delay timer threshold (V_START) is 0.3V,
and the Power-On Reset timer current (I_CPOR) is 2.5µA.
See Table 2 for some typical supply contact start-up
April 2009
delays using several standard value capacitors. As the
GATE voltage continues ramping toward its final value
(V_CC + V_GS) at a defined slew rate (See Load
Capacitance/Gate Capacitance Dominated Startup
sections), a second CPOR timing cycle begins if:
1)/FAULT is high and 2)CFILTER is low (i.e., not an
overvoltage, undervoltage lockout, or overcurrent state).
This second timing cycle (t_POR) begins when the voltage
at the FB pin exceeds its threshold (V_FB). This condition
indicates that the output voltage is valid. See Figure 3 in
the Timing Diagrams. When the power supply is already
present (i.e., not a “hot swapping” condition) and the
MIC2582/83 device is enabled by applying a logic high
signal at the ON pin, the GATE output begins ramping
immediately as the first CPOR timing cycle is bypassed.
Active current regulation is employed to limit the inrush
current transient response during start-up by regulating
the load current at the programmed current limit value
(See Current Limiting and Dual-Level Circuit Breaker
section). The following equation is used to determine the
nominal current limit value:
I _LIM
= ^VTRIPSLOW
R_SENSE
= ^50mV
R_SENSE
(2)
where V_TRIPSLOW is the current limit slow trip threshold
found in the electrical table and R_SENSE is the selected
value that will set the desired current limit. There are two
basic start-up modes for the MIC2582/83: 1) Start-up
dominated by load capacitance and 2) start-up
dominated by total gate capacitance. The magnitude of
the inrush current delivered to the load will determine the
dominant mode. If the inrush current is greater than the
programmed current limit (I_LIM), then load capacitance is
dominant. Otherwise, gate capacitance is dominant. The
expected inrush current may be calculated using the
following equation:
INRUSH
≅
I_GATE
x ^CLOAD
C_GATE
= 17μA x ^CLOAD
C_GATE
(3)
where I_GATE is the GATE pin pull-up current, C_LOAD is the
load capacitance, and C_GATE is the total GATE
capacitance (C_ISS of the external MOSFET and any
external capacitor connected from the MIC2582/83
GATE pin to ground).
Load Capacitance Dominated Start-Up
In this case, the load capacitance (C_LOAD) is large
enough to cause the inrush current to exceed the
programmed current limit but is less than the fast-trip
threshold (or the fast-trip threshold is disabled, ‘M’
option). During start-up under this condition, the load
current is regulated at the programmed current limit
value (I_LIM) and held constant until the output voltage
rises to its final value. The output slew rate and
equivalent GATE voltage slew rate is computed by the
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M9999-043009-C