MIC2174_10 Datasheet, PDF (13/27 Pages) Micrel Semiconductor – Synchronous Buck Controller Featuring Adaptive On-Time Control 40V Input, 300kHz

Micrel, Inc.
The circuit in Figure 4 illustrates the MIC2174/MIC2174C
current limiting circuit.
Figure 4. MIC2174/MIC2174C Current Limiting Circuit
Using the typical V_CL value of 130mV, the current limit
value is roughly estimated as:
I_CL
≈
130mV
R_DS(ON)
For designs where the current ripple is significant
compared to the load current I_OUT, or for low duty cycle
operation, calculating the current limit I_CL should take
into account that one is sensing the peak inductor
current and that there is a blanking delay of
approximately 150ns.
I_CL
=
130mV
R_DS(ON)
+
V_OUT × t_DLY
L
−
ΔI_L(pp)
2
(3)
ΔI_L(pp)
=
V_OUT × (1− D)
f _SW×L
(4)
where:
V_OUT = The output voltage
t_DLY = Current limit blanking time, 150ns typical
ΔI_L(pp) = Inductor current ripple peak-to-peak value
D = Duty Cycle
f_SW = Switching frequency
The MOSFET R_DS(ON) varies 30 to 40% with temperature.
Therefore, it is recommended to add 50% margin to I_CL
in the above equation to avoid false current limiting due
to an increased MOSFET junction temperature rise. It is
also recommended to connect the LX pin directly to the
drain of the low-side MOSFET to accurately sense the
MOSFETs R_DS(ON).
MIC2174/MIC2174C
MOSFET Gate Drive
The MIC2174/MIC2174C high-side drive circuit is
designed to switch an N-Channel MOSFET. The block
diagram of Figure 1 shows a bootstrap circuit, consisting
of D1 (a Schottky diode is recommended) and C_BST. This
circuit supplies energy to the high-side drive circuit.
Capacitor C_BST is charged, while the low-side MOSFET
is on, and the voltage on the LX pin is approximately 0V.
When the high-side MOSFET driver is turned on, energy
from C_BST is used to turn the MOSFET on. As the high-
side MOSFET turns on, the voltage on the LX pin
increases to approximately V_HSD. Diode D1 is reversed
biased and C_BST floats high while continuing to keep the
high-side MOSFET on. The bias current of the high-side
driver is less than 10mA so a 0.1μF to 1μF is sufficient to
hold the gate voltage with minimal droop for the power
stroke (high-side switching) cycle, i.e. ΔBST = 10mA x
3.33μs/0.1μF = 333mV. When the low-side MOSFET is
turned back on, C_BST is recharged through D1. A small
resistor R_G, which is in series with C_BST, can be used to
slow down the turn-on time of the high-side N-channel
MOSFET.
The drive voltage is derived from the supply voltage V_IN.
The nominal low-side gate drive voltage is V_IN and the
nominal high-side gate drive voltage is approximately V_IN
– V_DIODE, where V_DIODE is the voltage drop across D1. An
approximate 30ns delay between the high-side and low-
side driver transitions is used to prevent current from
simultaneously flowing unimpeded through both
MOSFETs.
September 2010
13
M9999-091310-C