MIC2174_10 Datasheet, PDF (12/27 Pages) Micrel Semiconductor – Synchronous Buck Controller Featuring Adaptive On-Time Control 40V Input, 300kHz

Micrel, Inc.
MIC2174/MIC2174C
the FB voltage ripple, which occurs when V_FB falls below
V_REF, the OFF period ends and the next ON-time period
is triggered through the control logic circuitry.
Figure 2. MIC2174/MIC2174C Control Loop Timing
Figure 3 shows the load transient operation of the
MIC2174/MIC2174C converter. The output voltage drops
due to the sudden load increase, which causes the FB
voltage to be less than V_REF. This will cause the error
comparator to trigger an ON-time period. At the end of
the ON-time period, a minimum OFF-time T_OFF(min) is
generated to charge C_BST since the FB voltage is still
below V_REF. Then, the next ON-time period is triggered
due to the low FB voltage. Therefore, the switching
frequency changes during the load transient. With the
varying duty cycle and switching frequency, the output
recovery time is fast and the output voltage deviation is
small in MIC2174/MIC2174C converter.
Figure 3. MIC2174/MIC2174C Load-Transient Response
Unlike in current-mode control, the MIC2174/MIC2174C
uses the output voltage ripple, which is proportional to
the inductor current ripple if the ESR of the output
capacitor is large enough, to trigger an ON-time period.
The MIC2174/MIC2174C predetermined ON-time control
loop has the advantage of constant ON-time mode
control that eliminates the need for the slope
compensation.
The MIC2174/MIC2174C has its own stability concern;
the FB voltage ripple should be in phase with the
inductor current ripple and large enough to be sensed by
the gm amplifier and the error comparator. The
recommended FB voltage ripple is 20mV~100mV. If a
low ESR output capacitor is selected, then the FB
voltage ripple may be too small to be sensed by the gm
amplifier and the error comparator. Also, the output
voltage ripple and the FB voltage ripple are not in phase
with the inductor current ripple if the ESR of the output
capacitor is very low. Therefore, the ripple injection is
required for a low ESR output capacitor. Please refer to
“Ripple Injection” subsection in “Application Information”
for more details about the ripple injection.
Soft-Start
Soft-start reduces the power supply input surge current
at startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The MIC2174/MIC2174C implements an internal digital
soft-start by making the 0.8V reference voltage V_REF
ramp from 0 to 100% in about 6ms with a 9.7mV step.
Therefore, the output voltage is controlled to increase
slowly by a stair-case V_REF ramp. Once the soft-start
cycle ends, the related circuitry is disabled to reduce
current consumption. V_IN must be powered up no earlier
than V_HSD to make the soft-start function behavior
correctly.
Current Limit
The MIC2174/MIC2174C uses the R_DS(ON) of the low-
side power MOSFET to sense over-current conditions.
This method will avoid adding cost, board space and
power losses taken by a discrete current sense resistor.
The low-side MOSFET is used because it displays much
lower parasitic oscillations during switching than the
high-side MOSFET.
In each switching cycle of the MIC2174/MIC2174C
converter, the inductor current is sensed by monitoring
the low-side MOSFET in the OFF period. The sensed
voltage is compared with a current-limit threshold
voltage V_CL after a blanking time of 150ns. If the sensed
voltage is over V_CL, which is 130mV typical at 0.8V
feedback voltage, then the MIC2174/MIC2174C turns off
the high-side MOSFET and a soft-start sequence is
triggered. This mode of operation is called “hiccup
mode” and its purpose is to protect the downstream load
in case of a hard short. The current limit threshold V_CL
has a fold back characteristic related to the FB voltage.
Please refer to the “Typical Characteristics” for the curve
of V_CL vs. FB voltage.
September 2010
12
M9999-091310-C