KSZ8842-16_08 Datasheet, PDF (121/141 Pages) Micrel Semiconductor – 2-Port Ethernet Switch with Non-PCI Interface

Micrel, Inc.
KSZ8842-16/32 MQL/MVL/MVLI/MBL
VLAN Table
The KSZ8842M uses the VLAN table to perform look-ups. If 802.1Q VLAN mode is enabled (SGCR2[15]), this table will
be used to retrieve the VLAN information that is associated with the ingress packet. This information includes FID (filter
ID), VID (VLAN ID), and VLAN membership as described in Table 20:
Bit
19
18-16
15-12
11-0
Default Value R/W
1
RW
111
R/W
0x0
R/W
0x001
R/W
Description
Valid
1: specifies that this entry is valid, the look up result will be used
0: specifies that this entry is not valid
Membership
Specifies which ports are members of the VLAN. If a DA look up fails (no match in
both static and dynamic tables), the packet associated with this VLAN will be
forwarded to ports specified in this field. For example: 101 means port 3 and 1 are in
this VLAN.
FID
Specifies the Filter ID. The KSZ8842M supports 16 active VLANs represented by
these four bit fields. The FID is the mapped ID. If 802.1Q VLAN is enabled, the look
up will be based on FID+DA and FID+SA.
VID
Specifies the IEEE 802.1Q 12 bits VLAN ID.
Table 20. VLAN Table Format (16 Entries)
If 802.1Q VLAN mode is enabled, then KSZ8842M will assign a VID to every ingress packet. If the packet is untagged or
tagged with a null VID, then the packet is assigned with the default port VID of the ingress port. If the packet is tagged
with non null VID, then VID in the tag will be used. The look up process will start from the VLAN table look up. If the VID
is not valid, then packet will be dropped and no address learning will take place. If the VID is valid, then FID is retrieved.
The FID+DA and FID+SA lookups are performed. The FID+DA look up determines the forwarding ports. If FID+DA fails,
then the packet will be broadcast to all the members (excluding the ingress port) of the VLAN. If FID+SA fails, then the
FID+SA will be learned.
VLAN Table Lookup Examples:
1. VLAN Table Read (read the third entry, at the indirect address offset 0x02)
Write to reg. IACR with 0x1402 (set indirect address and trigger a read VLAN table operation)
Then
Read reg. IADR5 (VLAN table bits 19-16)
Read reg. IADR4 (VLAN table bits 15-0)
2. VLAN Table Write (write the seventh entry, at the indirect address offset 0x06)
Write to reg. IADR5 (VLAN table bits 19-16)
Write to reg. IADR4 (VLAN table bits 15-0)
Write to reg. IACR with 0x1406 (set indirect address and trigger a read VLAN table operation)
October 2007
121
M9999-102207-1.9