KSZ8842-16_08 Datasheet, PDF (104/141 Pages) Micrel Semiconductor – 2-Port Ethernet Switch with Non-PCI Interface

Micrel, Inc.
KSZ8842-16/32 MQL/MVL/MVLI/MBL
Bank 48 Port 1 Egress Rate Control Register (0x0A): P1ERCR
Bit
Default
R/W Description
15-12 0x0
11-8
0x0
RW Egress Pri3 Rate
Egress data rate limit for priority 3 frames.
Output traffic from this priority queue is shaped according to the egress rate selected
below:
0000 = Not limited (default)
0001 = 64Kbps
0010 = 128Kbps
0011 = 256Kbps
0100 = 512Kbps
0101 = 1Mbps
0110 = 2Mbps
0111 = 4Mbps
1000 = 8Mbps
1001 = 16Mbps
1010 = 32Mbps
1011 = 48Mbps
1100 = 64 Mbps
1101 = 72Mbps
1110 = 80Mbps
1111 = 88Mbps
Notes: For 10BT, rate settings above 10Mbps are set to the default value 0000 (not
limited).
When multiple queue select enable is off (only 1 queue per port), rate limiting applies
only to priority 0 queue.
RW Egress Pri2 Rate
Egress data rate limit for priority 2 frames.
Output traffic from this priority queue is shaped according to the egress rate selected
below:
0000 = Not limited (default)
0001 = 64Kbps
0010 = 128Kbps
0011 = 256Kbps
0100 = 512Kbps
0101 = 1Mbps
0110 = 2Mbps
0111 = 4Mbps
1000 = 8Mbps
1001 = 16Mbps
1010 = 32Mbps
1011 = 48Mbps
1100 = 64 Mbps
1101 = 72Mbps
1110 = 80Mbps
1111 = 88Mbps
Notes: For 10BT, rate settings above 10Mbps are set to the default value 0000 (not
limited).
When multiple queue select enable is off (only 1 queue per port), rate limiting applies
only to priority 0 queue.
October 2007
104
M9999-102207-1.9