English
Language : 

MIC2166_1009 Datasheet, PDF (12/28 Pages) Micrel Semiconductor – Adaptive On-Time DC-DC Controller Hyper Speed Control™ Family
Micrel, Inc.
Figure 3 shows the load transient operation of the
MIC2166 converter. The output voltage drops due to the
sudden load increase, which causes VFB to be less than
VREF. This will cause the error comparator to trigger an
ON-time period. At the end of the ON-time period, a
minimum OFF-time TOFF(min) is generated to charge CBST
since VFB is still below VREF. Then, the next ON-time
period is triggered due to the low VFB. Therefore, the
switching frequency changes during the load transient.
With the varying duty-cycle and switching frequency, the
output recovery time is fast and the output voltage
deviation is small in MIC2166 converter.
Figure 3. MIC2166 Load-Transient Response
Unlike in current-mode control, the MIC2166 uses the
output voltage ripple, which is proportional to the
inductor current ripple if the ESR of the output capacitor
is large enough, to trigger an ON-time period. The
predetermined ON-time makes MIC2166 control loop
have the advantage of constant ON-time mode control
and eliminates the need for slope compensation.
The MIC2166 has its own stability concern: VFB ripple
should be in phase with the inductor current ripple and
large enough to be sensed by the gm amplifier and the
error comparator. The recommended VFB ripple is
20mV~100mV. If a low ESR output capacitor is selected,
the VFB ripple may be too small to be sensed by the gm
amplifier and the error comparator. Also, the VOUT ripple
and the VFB ripple are not in phase with the inductor
current ripple if the ESR of the output capacitor is very
low. Therefore, ripple injection is required for a low ESR
output capacitor. Please refer to “Ripple Injection”
subsection in “Application Information” for more details.
MIC2166
Soft-Start
Soft-start reduces the power supply input surge current
at startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The MIC2166 implements an internal digital soft-start by
making the 0.8V reference voltage VREF ramp from 0 to
100% in about 5ms. Therefore, the output voltage is
controlled to increase slowly by a stair-case VREF ramp.
Once the soft-start cycle ends, the related circuitry is
disabled to reduce current consumption.
Current Limit
The MIC2166 uses the RDS(ON) of the low-side power
MOSFET to sense over-current conditions. This method
will avoid adding cost, board space and power losses
taken by discrete current sense resistors. The low-side
MOSFET is used because it displays much lower
parasitic oscillations during switching than the high-side
MOSFET.
In each switching cycle of the MIC2166 converter, the
inductor current is sensed by monitoring the low-side
MOSFET in the OFF period. The sensed voltage is
compared with a current-limit threshold voltage VCL after
a blanking time of 150ns. If the sensed voltage is over
VCL, which is 133mV typical at 0.8V VFB, then the
MIC2166 turns off the high-side and low-side MOSFETs
and a soft-start sequence is triggered. This mode of
operation is called “hiccup mode” and its purpose is to
protect the downstream load in case of a hard short. The
current limit threshold VCL has a back fold characteristic
related to the FB voltage. Please refer to the “Typical
Characteristics” for the curve of current limit threshold vs.
FB voltage percentage. The circuit in Figure 4 illustrates
the MIC2166 current limiting circuit.
Figure 4. MIC2166 Current Limiting Circuit
September 2010
12
M9999-092410-C