MIC2166_1009 Datasheet, PDF (11/28 Pages) Micrel Semiconductor – Adaptive On-Time DC-DC Controller Hyper Speed Control™ Family

Micrel, Inc.
MIC2166
Functional Description
The MIC2166 is an adaptive on-time buck controller built
for low cost and high performance. Featuring an internal
5V linear regulator and Power-Good (PGOOD) output, it
is designed for a wide input voltage range from 4.5V to
28V, high output power buck converters. An estimated
ON-time method is used in the MIC2166 to obtain a
constant switching frequency and to simplify the control
compensation. Over-current protection is implemented
without the use of an external sense resistor. It includes
an internal soft-start function which reduces the power
supply input surge current at start-up by controlling the
output voltage rise time.
Theory of Operation
The MIC2166 is an adaptive on-time buck controller.
Figure 1 illustrates the block diagram for the control loop.
The output voltage variation will be sensed by the
MIC2166 feedback pin FB via the voltage divider. The
FB voltage V_FB is compared to a 0.8V reference voltage
V_REF at the error comparator through a low gain
transconductance (g_m) amplifier at switching frequency.
This g_m amplifier improves the MIC2166 converter output
voltage regulation. If the FB voltage V_FB decreases and
the output of the g_m amplifier is below 0.8V, The error
comparator will trigger the control logic and generate an
ON-time period, in which DH pin is logic high and DL pin
is logic low. The ON-time period length is predetermined
by the “Fixed T_ON Estimator” circuitry:
T_{ON(estimated)}
=
V_OUT
V_IN × f_sw
(1)
where V_OUT is the output voltage, V_IN is the power stage
input voltage, and f_SW is the switching frequency
(600kHz for MIC2166).
After an ON-time period, the MIC2166 goes into the
OFF-time period, in which DH pin is logic low and DL pin
is logic high. The OFF-time period length depends on
V_FB in most cases. When V_FB decreases and the output
of the g_m amplifier is below 0.8V, the ON-time period is
triggered and the OFF-time period ends. If the OFF-time
period determined by V_FB is less than the minimum OFF
time T_OFF(min), which is about 300ns typical, then the
MIC2166 control logic will apply the T_OFF(min) instead.
T_OFF(min) is required to maintain enough energy in the
boost capacitor (C_BST) to drive the high-side MOSFET.
The maximum duty-cycle is obtained from the 300ns
T_OFF(min):
D_MAX
=
T_S − T_OFF(min)
T_S
= 1− ^300ns
T_S
where T_S = 1/f_SW. It is not recommended to use MIC2166
with a OFF-time close to T_OFF(min) during steady state
operation. Also, as V_OUT increases, the internal ripple
injection will increase and reduce the line regulation
performance. Therefore, the maximum output voltage of
the MIC2166 should be limited to 5.5V. Please refer to
“Setting Output Voltage” subsection in “Application
Information” for more details.
The estimated ON-time method results in a constant
switching frequency in the MIC2166. The actual ON-time
varies slightly with the different rising and falling times of
the external MOSFETs. Therefore, the type of the
external MOSFETs and the output load current will
modify the actual ON-time and the switching frequency.
Also, the minimum T_ON results in a lower switching
frequency in high V_IN and low V_OUT applications, such as
24V to 1.0V. The minimum T_ON measured on the
MIC2166 evaluation board is about 100ns. During the
load transient, the switching frequency is changed due to
the varying OFF-time.
To illustrate the control loop, the steady-state and load-
transient scenarios are analyzed. For easy analysis, the
gain of the g_m amplifier is assumed to be 1. With this
assumption, the inverting input of the error comparator is
the same as V_FB. Figure 2 shows the MIC2166 control
loop timing during steady-state operation. During steady-
state, the g_m amplifier senses V_FB ripple, which is
proportional to the output voltage (V_OUT) ripple and the
inductor current ripple, to trigger the ON-time period. The
ON-time is predetermined by the estimation. The ending
of OFF-time is controlled by V_FB. At the valley of V_FB
ripple, which occurs when V_FB falls below V_REF, the OFF
period ends and the next ON-time period is triggered
through the control logic circuitry.
Figure 2. MIC2166 Control Loop Timing
September 2010
11
M9999-092410-C