PL123E-05SC Datasheet, PDF (1/10 Pages) Micrel Semiconductor – Low Skew Zero Delay Buffer

FE AT UR E S
 Frequency Range 10MHz to 220MHz
 Zero input - output delay.
 Low output-to-output skew.
 Optional Drive Strength:
Standard (8mA) PL123E-05
High (12mA) PL123E-05H
 2.5V or 3.3V, ±10% operation.
 Available in 8-pin SOP packaging.
(P P reliminary) L123E-05
Low Skew Zero Delay Buffer
DESCRIPTION
The PL123E-05 (-05H for High Drive) is a high perfor-
mance, low skew, low jitter zero delay buffer designed
to distribute high speed clocks. It has five low-skew
outputs that are synchronized with the input. The syn-
chronization is established via CLKOUT feed back to
the input of the PLL. Since the skew between the input
and output is less than 100ps, the device acts as a
zero delay buffer. The input output propagation delay
can be advanced or delayed by adjusting the load on
the CLKOUT pin.
These parts are not intended for 5V input-tolerant ap-
plications.
PIN CONFIGURATION
BLOCK DIAGRAM
REF
CLK2
CLK1
GND
1
8
2
7
3
6
4
5
SOP-8L
CLKOUT
CLK4
VDD
CLK3
REF
PLL
CLKOUT
CLK1
CLK2
CLK3
CLK4
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel [phone] • fax [phone] • www.micrel.com Rev 12/13/11 Page 1