TH8055 Datasheet, PDF (5/20 Pages) Micro Electronics – Single Wire CAN Transceiver

TH8055
Single Wire CAN Transceiver
Wake Up Mode
This bus includes a selective node awake capability, which allows normal communication to take place
among some nodes while leaving the other nodes in an undisturbed sleep state. This is accomplished by
controlling the signal voltages such that all nodes must wake up when they receive a higher voltage
message signal waveform. The communication system communicates to the nodes information as to which
nodes are to stay operational (awake) and which nodes are to put themselves into a non communicating low
power “sleep” state. Communication at the lower, normal voltage levels shall not disturb the sleeping nodes.
Normal mode
Transmission bit rate in normal communication is 33 Kbits/s. In normal transmission mode the TH8055
supports controlled waveform rise and overshoot times. Waveform trailing edge control is required to assure
that high frequency components are minimized at the beginning of the downward voltage slope. The
remaining fall time occurs after the bus is inactive with drivers off and is determined by the RC time constant
of the total bus load.
2.3 RxD Output pin
RxD polarity
‰ RxD = logic 1 on this pin indicates a bus recessive state (low bus voltage)
‰ RxD = logic 0 on this pin indicates a bus normal or high voltage bus dominant state
RxD in Sleep Mode
RxD do not pass signals to the micro processor while in sleep mode until a valid wake up bus voltage level is
received or the Mode 0,1 pins are not 0,0 respectively. When the valid wake up bus voltage signal awakens
the transceiver, the RxD pin signalised an interrupt (logic 0). However, if the Mode 0 & 1 pins are at logic 0,
the transceiver returns to the sleep condition when the wake up bus voltage signal is not present.
When not in sleep mode all valid bus signals will be sent out on the RxD pin.
RxD will be placed in the undriven or off state when in sleep mode.
RxD Typical Load
Resistance: 2.7 kOhm
Capacitance: < 25 pF
2.4 Bus LOAD pin
Resistor ground with internal open-on-loss-of-ground protection
When the ECU experiences a loss of ground condition, this pin is switched to a high impedance state.
The ground connection through this pin is not interrupted in any transceiver operating mode including the
sleep mode. The ground connection only is interrupted when there is a valid loss of ground condition.
This pin provides the bus load resistor with a path to ground which contributes less than 0.1 volts to the bus
offset voltage when sinking the maximum current through one unit load resistor.
The transceiver’s maximum bus leakage current contribution to VOL from the LOAD pin when in a loss of
ground state is 50uA over all operating temperatures and 3.5 < VBAT < 18 volts .
TH8055 - Datasheet
3901008055
Page 5 of 20
May 2004
Rev 005