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TH8061 Datasheet, PDF (23/36 Pages) Melexis Microelectronic Systems – Voltage Regulator with integrated LIN Transceiver
TH8061
Voltage Regulator with integrated LIN Transceiver
TJ -TA is the temperature difference between junction and ambient and Rth is the thermal resistance of the
package. The thermal energy is transferred via the package and the pins to the ambient. This transfer can be
improved with additional ground areas on the PCB as well as ground areas under the IC.
60
maximum current
50
40
SOIC8
TA=85°C
TJ=150°C
SOIC8
SOIC8
30
TA=125°C
TA=85°C
TJ=150°C
TJ=125°C
20
10
0
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
VSUP [V]
Figure 23 - Save operating area
The linear regulator of the TH8061 operates with input voltages up to 18V and can output a current of 50mA.
The maximum power dissipation limits the maximum output current at high input voltages and high ambient
temperatures. The output current of 50mA at an ambient temperature of TA = 125°C is only possible with
small voltage differences between VSUP and VCC. See Figure 23 for safe operating areas for different ambient
and junction temperatures.
4.2 Low Dropout Regulator
The voltage regulator of theTH8061 is a low dropout regulator (LDO) with a p-MOSFET as driving transistor.
This kind of regulator has a standard pole, generated from the internal frequency compensation and an
additional pole, which is dependent from the load and the load capacity. This additional pole can cause an
instable behaviour of the regulator! It is required a zero point to compensate this additional pole. It can be
realised via an additional load resistor in series with a load capacity. It is used for this compensation the
equivalent series resistance (ESR) of the load capacity. Every real capacity is characterized with an ESR
value. With the help of this ESR value an additional zero point is implemented into the amplification loop and
therefore the result of the negative phase shift is compensated.
Because of this correlation the regulator has a stable operating area which is defined by the load resistance
RL, the load capacity CL and the corresponding ESR value. The load resistance resp. load current is defined
by the application itself and therefore the compensation of the pole can only be done via variation of the load
capacity and ESR value.
Input Capacity on VSUP CIN
It is necessary an input capacity of CIN ≥ 4.7µF. Higher capacity values improves the line transient response
and the supply noise rejection behaviour. The combination of electrolytic capacity (e.g.100µF) in parallel with
a ceramic RF-capacity (e.g.100nF) archives good disturbance suppressing.
The input capacity should be as closed as possible (< 1cm) placed to the VSUP pin.
TH8061 – Datasheet
3901008061
Page 23 of 36
June 2004
Rev 007