MA007A Datasheet, PDF (8/16 Pages) Megawin Technology Co., Ltd – 3-in-1 8-bit serial to parallel latch

AC Characteristics
(VCC-GND = 5.0V, Ta = 25° C; unless otherwise specified)
PARAMETER
Maximum clock pulse
frequency (SCLK, PCLK)
Propagation delay
SYM.
FMAX
TPHL1
TPLH1
TPHL2
TPLH2
CONDITIONS
50 % duty cycle
SCLK to DOUTx, CL = 15 pF
PCLK to QXn, CL = 15 pF
TPHL3 /SCLR to DOUTx, CL = 15 pF
Setup Time
TSU1 Din to SCLK
TSU2 SCLK to PCLK
Pulse Width
Tri-state output enable time
Tri-state output disable time
Hold time
Removal time
TSU3
TW1
TW2
TW3
TPZH
TPZL
TPHZ
TPLZ
TH
TREM
SCLK to PCLK
SCLK
PCLK
/SCLR
/OE to QXn
/OE to QXn
Din to SCLK
/SCLR to SCLK
MIN.
-
TYP.
2.5
MAX.
5
-
95
195
-
100 200
-
100 200
10
-
-
100
-
-
-
5
10
25
-
-
25
-
-
25
-
-
-
100 200
-
100 200
5
-
-
10
-
-
UNIT
MHz
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
8
MA007A Technical Summary
MEGAWIN