MA007A Datasheet, PDF (4/16 Pages) Megawin Technology Co., Ltd – 3-in-1 8-bit serial to parallel latch

Function Description
FUNCTION TABLE
INPUTS
OUTPUTS
SCLK PCLK /OE /SCLR DINx DOUTx
QxN
FUNCTON
X XL L X
L
X↑L L X
L
X XH L X
L
↑X
L
H
H
Qx6’
X↑L H X
NC
↑↑L
H
X
Qx6’
Notes
H = HIGH voltage level; L = LOW voltage level
↑ = LOW-to-HIGH transition; ↓ = HIGH-to-LOW
Z = high-impedance OFF-state; NC = no change
X = don’t care.
NC A LOW level on /SCLR only affects the shift registers
L Empty shift register loaded into storage register
Z
Shift register clear. Parallel outputs in high-impedance
OFF-state
Logic high level shifted into shift register stage 0.
NC
Contents of all shift register stages shifted through, e.g.
previous state of stage 6 (internal Qx6’) appears on the
serial output (DOUTx)
Contents of shift register stages (internal Qxn’) are
Qxn’ transferred to the storage register and parallel output
stages
Contents of shift register shifted through. Previous
Qxn’ contents of the shift register are transferred to the
storage register and the parallel output stages.
4
MA007A Technical Summary
MEGAWIN