MG82FG5B32 Datasheet, PDF (219/273 Pages) Megawin Technology Co., Ltd – Flexible IAP size by software configured

Bit 1~0: ADC Trigger Mode selection.
ADTM[1:0]
ADC Conversion Start Selection
00
Set ADCS
01
Timer 0 overflow
10
Free running mode
11
S1 BRG overflow
ADCFG1: ADC Configuration Register 1
SFR Page
= 0~F
SFR Address = 0xBB
7
6
5
4
--
VRS2
VRS1
SIGN
R/W
R/W
R/W
R/W
RESET = xxx0-0000
3
2
AOS.3
AOS.2
R/W
R/W
1
AOS.1
R/W
0
AOS.0
R/W
Bit 7: Reserved. Software must write “0” on this bit when ADCFG1 is written.
Bit 6~5: VRS2~VRS1. ADC Voltage Reference Selection control (VRS2, VRS1 and VRS0).
VRS[2:0] Function
S3, S2, S1 LDO_24_en
000
ADC VREF+ = VDDA
010
Dis
001
ADC VREF+ = AIN1 external VREF input
100
Dis
010
ADC VREF+ = VDDA, LDO24 for AIN15
010
En
011
ADC VREF+ = LDO_24 with Ext. pad
101
En
100
ADC VREF+ = VDDA
010
Dis
101
ADC VREF+ = VDDA
010
Dis
110
ADC VREF+ = VDDA with Ext. pad
110
Dis
111
ADC VREF+ = LDO_24
001
En
S1
LDO_24
LDO_24_en
S2
Int. VDDA
ADC VREF+
S3
Ext. PAD
(P1.1, AIN1)
Bit 4~0: SIGN and AOS.3~0. The register value adjusts the ADC result in {ADCH, ADCL} for offset cancellation.
{Sign, AOS.[3:0]} Value in {ADCDH, ADCDL}
0_1111
ADC transfer value + 15
0_1110
ADC transfer value + 14
……
……
0_0010
ADC transfer value + 2
0_0001
ADC transfer value + 1
0_0000
ADC transfer value + 0
1_1111
ADC transfer value – 1
1_1110
ADC transfer value – 2
……
……
1_0001
ADC transfer value – 15
1_0000
ADC transfer value – 16
P1AIO: Port 1 Analog Input Only
SFR Page
= 0~F
SFR Address = 0x92
7
6
5
P17AIO P16AIO P15AIO
RESET = 0000-0000
4
3
2
P14AIO P13AIO P12AIO
1
P11AIO
0
P10AIO
MEGAWIN
MG82FG5BXX Data Sheet
219