MDT10P65_11 Datasheet, PDF (9/14 Pages) Micon Design Technology Corporation – 8-bit micro-controller

MDT10P65
Condition
POWR ON RESET
/MCLR reset (not during SLEEP)
/MCLR reset during SLEEP
WDT reset (not during SLEEP)
WDT reset during SLEEP
Interrupt Wake-up during SLEEP
Status
bit 4
1
u
1
0
0
1
Status
bit 3
1
u
0
1
0
0
PSTA
bit 1
0
u
u
u
u
u
9. Instruction Set
Instruction Code
Mnemonic
Operands
Function
010000 00000000 _NOP
No operation
010000 00000001 _{CLRWT Clear Watchdog timer}
010000 00000010 _SLEEP
Sleep mode
010000 00000011 _{TMODE Load W to TMODE register}
010000 00000rrr _{CPIO R Control I/O port register}
010001 1rrrrrrr _{STWR R Store W to register}
011000 trrrrrrr _{LDR R, t Load register}
111010 iiiiiiii _{LDWI I Load immediate to W}
010111 trrrrrrr _{SWAPR R, t Swap halves register}
011001 trrrrrrr _{INCR R, t Increment register}
011010 trrrrrrr _{INCRSZ R, t Increment register, skip if}
zero
011011 trrrrrrr _{ADDWR R, t Add W and register}
011100 trrrrrrr _{SUBWR R, t Subtract W from register}
011101 trrrrrrr _{DECR R, t Decrement register}
011110 trrrrrrr _{DECRSZ R, Decrement register, skip if}
t
zero
010010 trrrrrrr _{ANDWR R, t AND W and register}
110100 iiiiiiii _{ANDWI i AND W and immediate}
010011 trrrrrrr _{IORWR R, t Inclu. OR W and register}
110101 iiiiiiii _{IORWI i Inclu. OR W and immediate}
Operation Status
None
0→WT
0→WT,
stop OSC
W→TMODE
W→CPIO r
W→R
R→t
I→W
[R(0~3) ↔
R(4~7)]→t
R + 1→t
R + 1→t
TF, PF
TF, PF
None
None
None
Z
None
None
Z
None
W + R→t
R ﹣W→t
(R+/W+1→t)
R ﹣1→t
R ﹣1→t
C, HC, Z
C, HC, Z
Z
None
R ∩ W→t
Z
i ∩ W→W
Z
R ∪ W→t
Z
i ∪ W→W
Z
This specification are subject to be changed without notice. Any latest information
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P. 9
2007/9 Ver. 1.8