MX66L51235F Datasheet, PDF (22/107 Pages) Macronix International – 3V 512M-BIT [x 1/x 2/x 4] CMOS MXSMIO® (SERIAL MULTI I/O) FLASH MEMORY

Reset Commands
Command
(byte)
Mode
1st byte
2nd byte
3rd byte
4th byte
5th byte
NOP
RSTEN
(No Operation) (Reset Enable)
SPI/QPI
00 (hex)
SPI/QPI
66 (hex)
RST
(Reset
Memory)
SPI/QPI
99 (hex)
Action
MX66L51235F
Note 1: The count base is 4-bit for ADD(2) and Dummy(2) because of 2 x I/O. And the MSB is on SO/SIO1 which is different
from 1 x I/O condition.
Note 2: ADD=00H will output the manufacturer ID first and AD=01H will output device ID first.
Note 3: It is not recommended to adopt any other code not in the command definition table, which will potentially enter the hid-
den mode.
Note 4: Before executing RST command, RSTEN command must be executed. If there is any other command to interfere, the
reset operation will be disabled.
Note 5: The number in parentheses after "ADD" or "Data" stands for how many clock cycles it has. For example, "Data(8)"
represents there are 8 clock cycles for the data in. Please note the number after "ADD" are based on 3-byte address
mode, for 4-byte address mode, which will be increased.
P/N: PM1832
REV. 1.0, MAY. 23, 2013
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