9240LP Datasheet, PDF (7/18 Pages) Maxwell Technologies – 14-Bit, 10 MSPS Monolithic A/D Converter with LPT ASIC

14-Bit, 10 MSPS Monolithic A/D Converter with LPT ASIC
9240LP
PARAMETER
TABLE 5. 9240LP DIGITAL SPECIFICATIONS
(AVDD = 5V, DVDD = 5V, T_A = -55 TO +125°C, UNLESS OTHERWISE SPECIFIED)
SUBGROUPS SYMBOL
MIN
TYP
MAX
UNIT
LOGIC OUTPUTS (with DRVDD = 5V)
1, 2, 3
High Level Output Voltage (I_OH = 50 µ A)
V_OH
High Level Output Voltage (I_OH = 0.5 mA)
V_OH
Low Level Output Voltage (I_OL = 1.6 mA)
V_OL
Low Level Output Voltage (I_OL = 50 µ A)
V_OL
Output Capacitance
C_OUT
4.5
V min
2.4
V min
0.4
V max
0.1
V max
5
--
pF typ
1. Due to the voltage drop across the LPT circuiry the CLOCK signal must be no greater than AVDD - 0.5V
2. Guaranteed by design
PARAMETER
TABLE 6. 9240LP SWITCHING CHARACTERISTICS1
(T_A = -55 TO +125°C WITH AVDD = 5V, DVDD = 5V, DRVDD = 5V, R_BIAS = 2 KW, C_L = 20 PF)
SYMBOL
MIN
TYP
MAX
Clock Period
CLOCK Pulse width High
CLOCK Pulse width Low
Output Delay
Pipeline Delay (Latency)
1. Guaranteed by design
t_C
100
--
--
t_CH
45
--
--
t_CL
45
--
--
t_OD
8
13
19
--
--
--3
UNITS
ns
ns
ns
ns
Clock Cycles
01.10.05 REV 6
All data sheets are subject to change without notice 7
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