9240LP Datasheet, PDF (2/18 Pages) Maxwell Technologies – 14-Bit, 10 MSPS Monolithic A/D Converter with LPT ASIC

14-Bit, 10 MSPS Monolithic A/D Converter with LPT ASIC
9240LP
PIN NUMBER
1
2, 29
3
4, 28
5
6
7
8
9
10
11
12-23
24
25
26, 27, 30
31
32
33
34, 38
35
36
37
39
40
41
42
43
44
TABLE 1. 9240LP PIN DESCRIPTION
NAME
DESCRIPTION
DVSS
AVSS
DVDD
AVDD
NC
DRVDD
CLK
LPTSTATUS
LPTBIT
NC
BIT 14
BIT 13-BIT 2
BIT 1
OTR
NC
SENSE
VREF
REFCOM
NC
BIAS ¹
CAPB
CAPT
CML
LPTVREF
VINA
VINB
LPTDVDD
LPTAVDD
Digital Ground
Analog Ground
5V Digital Supply
5V Analog Supply
No Connect
Digital Output Driver Supply
Clock Input Pin
A 0 to 5V square-wave is output during the deci-
sion time and protect time. Normally low.
The LPT circuit will crowbar the power supplies
to the 9240 for as long as a logic high is applied.
Used to verify operation of the LPT. Normally a
logical low or ground is applied to this input.
No Connect
Least Significant Data Bit (LSB)
Data Output Bits
Most Significant Data Bits (MSB)
Out of Range
No Connect
Reference Select
Reference I/O
Reference Common
No Connect
Power/Speed Programming
Noise Reduction Pin
Noise Reduction Pin
Common-Mod Level (Midsupply)
Protected Reference I/O
Analog Input Pin (+)
Analog Input Pin (-)
Protected 5V Digital Supply
Protected 5V Analog Supply
1. See Speed/Power programmability section.
01.10.05 REV 6
All data sheets are subject to change without notice 2
©2005 Maxwell Technologies
All rights reserved.