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9042 Datasheet, PDF (4/26 Pages) Maxwell Technologies – 12-Bit, 41 MSPS A/D Converter
12-Bit, 41 MSPS A/D Converter
9042
TABLE 4. 9042 DC ELECTRICAL CHARACTERISTICS
(AVCC = DVCC = +5V ±5%; VREF TIED TO VOFFSET THROUGH 50 Ω; TA = -55°C TO +125°C
PARAMETER
SYMBOL
CONDITION
SUBGROUPS MIN
TYP
MAX
Analog Input (AIN)
Input Voltage Range
1, 2, 3
VREF
±0.5
Input Resistance
Input Capacitance
ENCODE INPUTS1,3
Logic Compatibility4
-55 to 125°C 2, 3
25°C
1
200 250 300
7
TTL/
CMOS
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current (VINH = 5V)
Logic “0” Current (VINL = 0V)
Input Capacitance
VIH
-55 to 125°C 1, 2, 3 2.0
5.0
VIL
-55 to 125°C 1, 2, 3
0
0.8
IIH
-55 to 125°C 1, 2, 3 450 625 800
IIL
-55 to 125°C 1, 2, 3 -400 -300 -200
25°C
1
2.5
DIGITAL OUTPUTS
Logic Compatibility
CMOS
Logic “1” Voltage (IOH = 10 µ A)
Logic “0” Voltage (IOL = 10 µ A)
VOH
25°C
1
3.5 4.2
-55 to 125°C 1, 2, 3 3.5
VOL
25° C,125° C
1, 2
-55
3
-- 0.80
0.90
Output Coding
POWER SUPPLY
Twos Compliment
Analog Supply Voltage
Analog Supply Current
Digital Supply Voltage
Digital Supply Current
Supply Current (Total)
Power Dissipation
AVCC
I AVCC
DVCC
I DVCC
ICCTOTAL
-55 to 125°C
-55 to 125°C
-55 to 125°C
-55 to 125°C
-55 to 125°C
-55 to 125°C
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
5.0
--
160
5.0
--
20
119 180
595 990
Power Supply Rejection
Differential Non-linearity
(ENCODE = 20 MSPS)
PSRR
25°C
1
-20
±1
20
-55 to 125°C 1, 2, 3
±5
DNL -55 to 125°C 1, 2,3 -1.0 ±0.3 1.0
Integral Non-linearity
(ENCODE = 20 MSPS)
INL
-55 to 125°C 1, 2, 3 -1.5 ±0.75 1.5
1. Guaranteed by design.
2. VREF is normally tied to VOFFSET through 50 ohms. If VREF is used to provide dc offset to other circuits, it should first be buffered
3. ENCODE driven by single-ended source; ENCODE bypassed to ground through 0.01 µ F capacitor.
4. ENCODE may also be driven differently in conjunction with ENCODE.
UNIT
V
Ω
V
V
µA
µA
pF
V
V
V
mA
V
mA
mA
mW
mV/V
mV/V
LSB
LSB
01.07.05 REV 7
All data sheets are subject to change without notice 4
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