97SD3248_06 Datasheet, PDF (29/40 Pages) Maxwell Technologies – 1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks

1.5Gb (8-Meg X 48-Bit X 4-Banks) SDRAM
97SD3248
Read with Auto Precharge to READ command interval
1. Different bank: When some banks are in the active state, the second read command ( another bank) is
executed. Even when the first read with auto-precharge is a burst read that is not yet finished, the data read
by the second command is valid. The interval auto-precharge of one bank starts at the next clock of the
second command.
Read with Auto Precharge to Read Command Interval (Different Bank)
2. Same Bank: The consecutive read command (the same bank) is illegal.
Write with Auto Precharge to Write command interval
1. Different bank: When some banks are in the active state, the second write command (another bank) is
executed. In the case of burst writes, the second write command has priority. The internal auto-precharge of
one bank starts at the next clock of the second command.
Write with Auto Precharge to Write Command Interval (Different bank)
05.10.06 Rev 4
All data sheets are subject to change without notice 29
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