MAX1393_09 Datasheet, PDF (9/18 Pages) Maxim Integrated Products – 1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/2-Channel Single-Ended, 12-Bit, SAR ADCs

1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
and the difference between the sampled positive and
negative input voltages is converted. The time required
for the T/H to acquire an input signal is determined by
how quickly its input capacitance is charged. The
required acquisition time lengthens as the input signal’s
source impedance increases. The acquisition time,
t_ACQ, is the minimum time needed for the signal to be
acquired. It is calculated by the following equation:
t_ACQ ≥ 9 x (R_SOURCE + R_IN) x C_IN + t_PU
where:
R_SOURCE is the source impedance of the input signal.
R_IN = 500Ω, which is the equivalent differential analog
input resistance.
C_IN = 16pF, which is the equivalent differential analog
input capacitance.
t_PU = 400ns.
Note: t_ACQ is never less than 600ns and any source
impedance below 400Ω does not significantly affect the
ADC’s AC performance.
R_SOURCE
ANALOG
SIGNAL
SOURCE
AIN2
A_IN1 (AIN+)*
HOLD
GND (AIN-)*
REF
GND
DAC
CIN+
CIN-
RIN-
MAX1393
MAX1396
COMPARATOR
+
-
RIN+
HOLD
V_DD/2
TRACK
HOLD
*INDICATES THE MAX1393
Figure 4. Equivalent Input Circuit
Analog Input Bandwidth
The ADC’s input-tracking circuitry has a 4MHz full-
power bandwidth, making it possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques.
Use anti-alias filtering to avoid high-frequency signals
being aliased into the frequency band of interest.
Analog Input Range and Protection
The MAX1393/MAX1396 produce a digital output that
corresponds to the analog input voltage as long as the
analog inputs are within their specified range. When
operating the MAX1393 in unipolar mode (UNI/BIP = 1),
the specified differential analog input range is from 0 to
V_REF. When operating in bipolar mode (UNI/BIP = 0),
the differential analog input range is from -V_REF/2 to
+V_REF/2 with a common-mode range of 0 to V_DD. The
MAX1396 has an input range from 0 to V_REF.
Internal protection diodes confine the analog input volt-
age within the region of the analog power input rails
(V_DD, GND) and allow the analog input voltage to swing
from GND - 0.3V to V_DD + 0.3V without damage. Input
voltages beyond GND - 0.3V and V_DD + 0.3V forward
bias the internal protection diodes. In this situation, limit
the forward diode current to less than 50mA to avoid
damage to the MAX1393/MAX1396.
Output Data Format
Figures 8, 9, and 10 illustrate the conversion timing for
the MAX1393/MAX1396. Sixteen SCLK cycles are
required to read the conversion result and data on
DOUT transitions on the falling edge of SCLK. The con-
version result contains 4 zeros, followed by 12 data bits
with the data in MSB-first format. For the MAX1393, data
is straight binary for unipolar mode and two’s comple-
ment for bipolar mode. For the MAX1396, data is always
straight binary.
Transfer Function
Figure 5 shows the unipolar transfer function for the
MAX1393/MAX1396. Figure 6 shows the bipolar trans-
fer function for the MAX1393. Code transitions occur
halfway between successive-integer LSB values.
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