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MAX1205 Datasheet, PDF (9/12 Pages) Maxim Integrated Products – +5v sINGLE-sUPPLY, 1mSPS, 14-bIT sELF-cALIBRATING adc
+5V Single-Supply, 1Msps, 14-Bit
Self-Calibrating ADC
external amplifiers to compensate for any resistive drop
on these lines, internal or external to the chip. Ensure a
correct reference voltage by using proper Kelvin con-
nections at the sense pins.
Common-Mode Voltage
The switched capacitor input circuit at the analog input
allows signals between AGND and the analog power
supply. Since the common-mode voltage has a strong
influence on the performance of the ADC, the best
results are obtained by choosing VCM to be at half the
difference between the reference voltages VRFP and
VRFN. Achieve this by using a resistive divider between
the two reference potentials. Figure 4 shows a typical
driving circuit for good dynamic performance.
Analog Signal Conditioning
For single-ended inputs the negative analog input pin
(INN) is connected to the common-mode voltage pin
(CM), and the positive analog input pin (INP) is con-
nected to the input.
To take full advantage of the ADC’s superior AC perfor-
mance up to the Nyquist frequency, drive the chip with
differential signals. In communication systems, the sig-
nals may inherently be available in differential mode.
Medical and/or other applications may only provide sin-
gle-ended inputs. In this case, convert the single-
ended signals into differential ones by using the circuit
recommended in Figure 5. Use low-noise, wideband
amplifiers such as the MAX4108 to maintain the signal
purity over the full-power bandwidth of the MAX1205
input.
Lowpass or bandpass signals may be required to
improve the signal-to-noise-and-distortion ratio of the
incoming signal. For low-frequency signals (<100kHz),
active filters may be used. For higher frequencies, pas-
sive filters are more convenient.
Single-Ended to Differential
Conversion Using Transformers
An alternative single-ended to differential-ended con-
version method is a balun transformer such as the
CTX03-13675 from Coiltronics. An important benefit of
these transformers is their ability to level-shift single-
ended signals referred to ground on the primary side to
optimum common-mode voltages on the secondary
side. At frequencies below 20kHz, the transformer core
begins to saturate, causing odd-order harmonics.
Clock Source Requirements
Pipelined ADCs typically need a 50% duty cycle clock.
To avoid this constraint, the MAX1205 provides a
RFP = 4.096V
5k
MAX410
5k
RFN = 0V
MAX410
MAX410
V+
CHIP BOUNDARY
RFPF
IN
INP
MAX4108
RFPS
CM
V-
RFNF
RFNS
CM
V+
INN
MAX4108
V-
CM
Figure 4. Drive Circuit for the Reference Pins and the Common-
Mode Pin
Figure 5. A simple circuit generates differential signals from a
single-ended input referred to analog ground. The common-
mode voltage at INP and INN is the same as CM.
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