MAX11644 Datasheet, PDF (9/21 Pages) Maxim Integrated Products – 2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 1-/2-Channel, 2-Wire Serial, 12-Bit ADCs

2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
1-/2-Channel, 2-Wire Serial, 12-Bit ADCs
SDA
SCL
INPUT SHIFT REGISTER
V_DD
GND
SETUP REGISTER
CONTROL
LOGIC
INTERNAL
OSCILLATOR
CONFIGURATION REGISTER
AIN0
AIN1
T/H
12-BIT
ADC
ANALOG
INPUT
REF
MUX
REFERENCE
4.096V (MAX11644)
2.048V (MAX11645)
REF
OUTPUT SHIFT
REGISTER
AND RAM
MAX11644
MAX11645
Figure 2. Simplified Functional Diagram
V_DD
I_OL
SDA
V_OUT
400pF
I_OH
Figure 3. Load Circuit
Detailed Description
The MAX11644/MAX11645 analog-to-digital converters
(ADCs) use successive-approximation conversion tech-
niques and fully differential input track/hold (T/H) cir-
cuitry to capture and convert an analog signal to a
serial 12-bit digital output. The MAX11644/MAX11645
measure either two single-ended or one differential
input(s). These devices feature a high-speed, 2-wire
serial interface supporting data rates up to 1.7MHz.
Figure 2 shows the simplified internal structure for the
MAX11644/MAX11645.
Power Supply
The MAX11644/MAX11645 operate from a single sup-
ply and consume 670µA (typ) at sampling rates up to
94.4ksps. The MAX11645 feature a 2.048V internal ref-
erence and the MAX11644 feature a 4.096V internal ref-
erence. All devices can be configured for use with an
external reference from 1V to V_DD.
Analog Input and Track/Hold
The MAX11644/MAX11645 analog-input architecture
contains an analog-input multiplexer (mux), a fully dif-
ferential track-and-hold (T/H) capacitor, T/H switches, a
comparator, and a fully differential switched capacitive
digital-to-analog converter (DAC) (Figure 4).
In single-ended mode, the analog input multiplexer
connects C_T/H between the analog input selected by
CS[0] (see the Configuration/Setup Bytes (Write Cycle)
section) and GND (Table 3). In differential mode, the
analog-input multiplexer connects C_T/H to the + and -
analog inputs selected by CS[0] (Table 4).
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