MAX1084 Datasheet, PDF (9/16 Pages) Maxim Integrated Products – 400ksps/300ksps, Single-Supply, Low-Power, Serial 10-Bit ADCs with Internal Reference

400ksps/300ksps, Single-Supply, Low-Power,
Serial 10-Bit ADCs with Internal Reference
DAC, which in turn forms a digital representation of the
analog input signal. At the conversion’s end, the input
side of C_HOLD switches back to AIN, and C_HOLD
charges to the input signal again.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed between conversions. The acquisition time,
t_ACQ, is the maximum time the device takes to acquire
the signal and the minimum time needed for the signal
to be acquired. Acquisition time is calculated by:
t_ACQ = 7(R_S + R_IN) ✕ 12pF
where R_IN = 800Ω, R_S = the input signal’s source
impedance, and t_ACQ is never less than 468ns
(MAX1284) or 625ns (MAX1085). Source impedance
below 4kΩ does not significantly affect the ADC’s AC
performance.
Higher source impedances can be used if a 0.01µF
capacitor is connected to the analog input. Note that
the input capacitor forms an RC filter with the input
source impedance, limiting the ADC’s input signal
bandwidth.
Input Bandwidth
The ADC’s input tracking circuitry has a 6MHz
(MAX1084) or 3MHz (MAX1085) small-signal band-
width, so it is possible to digitize high-speed transient
events and measure periodic signals with bandwidths
exceeding the ADC’s sampling rate by using under-
sampling techniques. To avoid aliasing of unwanted
high-frequency signals into the frequency band of inter-
est, anti-alias filtering is recommended.
Analog Input Protection
Internal protection diodes, which clamp the analog
input to V_DD and GND, allow the input to swing from
GND - 0.3V to V_DD + 0.3V without damage.
If the analog input exceeds 50mV beyond the supplies,
limit the input current to 2mA.
Internal Reference
The MAX1084/MAX1085 have an on-chip voltage refer-
ence trimmed to 2.5V. The internal reference output is
connected to REF and also drives the internal capacitive
DAC. The output can be used as a reference voltage
source for other components and can source up to
800µA. Bypass REF with a 4.7µF capacitor. Larger
capacitors increase wake-up time when exiting shut-
down (see Using SHDN to Reduce Supply Current). The
internal reference is disabled in shutdown (SHDN = 0).
+3V to +5V
10µF 0.1µF
1 _VDD
SCLK ⁸
ANALOG INPUT
0 TO V_REF
2 _AIN
CS ⁷
SHUTDOWN
INPUT
MAX1084
MAX1085
3 _SHDN
DOUT ⁶
4 _REF
GND ⁵
4.7µF
SERIAL
INTERFACE
Figure 3. Typical Operating Circuit
GND
CAPACITIVE DAC
REF
AIN
C_HOLD
12pF
ZERO
C_SWITCH*
6pF
HOLD
R_IN
800Ω
TRACK
COMPARATOR
*INCLUDES ALL INPUT PARASITICS
Figure 4. Equivalent Input Circuit
AUTOZERO
RAIL
Serial Interface
Initialization After Power-Up and
Starting a Conversion
When power is first applied, and if SHDN is not pulled
low, it takes the fully discharged 4.7µF reference
bypass capacitor up to 1.4ms to acquire adequate
charge for specified accuracy. No conversions should
be performed during this time.
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