DS1338 Datasheet, PDF (8/16 Pages) Maxim Integrated Products – I2C RTC with 56-Byte NV RAM

DS1338 I²C RTC with 56-Byte NV RAM
OPERATION
The DS1338 operates as a slave device on the serial bus. Access is obtained by implementing a START condition
and providing a device identification code, followed by data. Subsequent registers can be accessed sequentially
until a STOP condition is executed. The device is fully accessible and data can be written and read when V_CC is
greater than V_PF. However, when V_CC falls below V_PF, the internal clock registers are blocked from any access. If
V_PF is less than V_BAT, the device power is switched from V_CC to V_BAT when V_CC drops below V_PF. If V_PF is greater
than V_BAT, the device power is switched from V_CC to V_BAT when V_CC drops below V_BAT. The oscillator and
timekeeping functions are maintained from the V_BAT source until V_CC is returned to nominal levels. The block
diagram (Figure 3) shows the main elements of the DS1338.
An enable bit in the seconds register controls the oscillator. Oscillator startup times are highly dependent upon
crystal characteristics, PC board leakage, and layout. High ESR and excessive capacitive loads are the major
contributors to long start-up times. A circuit using a crystal with the recommended characteristics and proper layout
usually starts within 1 second.
POWER CONTROL
The power-control function is provided by a precise, temperature-compensated voltage reference and a
comparator circuit that monitors the V_CC level. The device is fully accessible and data can be written and read when
V_CC is greater than V_PF. However, when V_CC falls below V_PF, the internal clock registers are blocked from any
access. If V_PF is less than V_BAT, the device power is switched from V_CC to V_BAT when V_CC drops below V_PF. If V_PF is
greater than V_BAT, the device power is switched from V_CC to V_BAT when V_CC drops below V_BAT. The registers are
maintained from the V_BAT source until V_CC is returned to nominal levels (Table 1). After V_CC returns above V_PF, read
and write access is allowed after t_REC (Figure 1).
Table 1. Power Control
SUPPLY
CONDITION
V_CC < V_PF, V_CC < V_BAT
V_CC < V_PF, V_CC > V_BAT
V_CC > V_PF, V_CC < V_BAT
V_CC > V_PF, V_CC > V_BAT
READ/WRITE
ACCESS
No
No
Yes
Yes
POWERED
BY
V_BAT
V_CC
V_CC
V_CC
OSCILLATOR CIRCUIT
The DS1338 uses an external 32.768kHz crystal. The oscillator circuit does not require any external resistors or
capacitors to operate. Table 2 specifies several crystal parameters for the external crystal. Figure 3 shows a
functional schematic of the oscillator circuit. The startup time is usually less than 1 second when using a crystal
with the specified characteristics.
Table 2. Crystal Specifications^*
PARAMETER
SYMBOL MIN
Nominal Frequency
Series Resistance
Load Capacitance
f_O
ESR
C_L
TYP
32.768
12.5
MAX
50
UNITS
kHz
kΩ
pF
*The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to
Application Note 58: Crystal Considerations for Dallas Real-Time Clocks for additional specifications.
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