MAX1661 Datasheet, PDF (7/16 Pages) Maxim Integrated Products – Active-Matrix Liquid Crystal Display AMLCD Supply

Active-Matrix Liquid Crystal Display
(AMLCD) Supply
______________________________________________________________Pin Description
PIN NAME
FUNCTION
1
SHDN
Shutdown Input. Drive low to enter shutdown mode. Drive high or connect to IN for normal operation. All IC
sections are off when SHDN is low.
2
RDY
Ready Indicator Output, DC-DC 1 and DC-DC 2. Open-drain N-channel output becomes high impedance
when all three outputs are within 10% of regulation.
3
FB1
Regulator Feedback Input, DC-DC 1. Regulates to 1.25V nominal.
4
REF
Internal Reference Output. Connect a 0.22µF capacitor from this pin to GND. REF can source up to 50µA.
5
GND Analog Ground. Connect to PGND1 and PGND2. See Supply Connections and Layout section.
6
IN
Supply Input to the IC. The input voltage range is +2.8V to +5.5V.
7
FB2- Regulator Feedback Input for Negative Output, DC-DC 2. Regulates to 0V nominal.
8
FB2+ Regulator Feedback Input for Positive Output, DC-DC 2. Regulates to 1.25V nominal.
9
PLLC PLL Compensation. Connect compensation network as in Figure 4.
10
BPV_SS Backplane Driver Negative Supply. Typically connected to PGND1. May be connected to a separate supply.
11
BPDRV Backplane Driver Output
12
BPV_DD
Backplane Driver Positive Supply. Typically connected to V_OUT1 of DC-DC 1. May be connected to a
separate supply.
13
BPCLK Backplane Driver Clock Input. See Table 1 for input frequency ranges.
14
INP
DC-DC 2 Power Input. Source of Internal LX2P P-channel MOSFET.
15
LX2P Drain of Internal LX2P P-Channel MOSFET
16
LX2N Drain of Internal LX2N N-Channel MOSFET
17 PGND2 Power Ground 2. Connect to PGND1. Source of internal LX2N N-channel MOSFET.
18 PGND1 Power Ground 1. Connect to PGND2. Source of internal LX1 N-channel MOSFET.
19
LX1
Drain of Internal LX1 N-Channel MOSFET
20
FPLL Sets the BPCLK input frequency range for PLL synchronization. Connect to GND, REF, or IN. See Table 1.
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