MAX115-MAX116 Datasheet, PDF (6/14 Pages) Maxim Integrated Products – 2x4-Channel, Simultaneous-Sampling 12-Bit ADCs

2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
______________________________________________________________Pin Description
PIN
1, 2
3, 4
5
6
7
8, 36
9–16
17
18
19, 20
21, 22
23, 24
25
26
27
28
29
30
31
32, 33
34, 35
NAME
CH2B, CH2A
CH1B, CH1A
AV_DD
REFIN
REFOUT
AGND
D11–D4
DV_DD
DGND
D3, D2
D1/A3, D0/A2
A1, A0
CLK
CS
WR
RD
CONVST
INT
AV_SS
CH4A, CH4B
CH3A, CH3B
FUNCTION
Channel 2 Multiplexed Inputs (single-ended)
Channel 1 Multiplexed Inputs (single-ended)
Analog Supply Voltage
External reference input/internal reference output. Bypass with a 0.1µF capacitor to AGND.
Reference-Buffer output. Bypass with a 4.7µF capacitor to AGND.
Analog ground. Both pins must be connected to ground.
Data Bits. D11 = MSB.
Digital Supply Voltage
Digital Ground
Data Bits
Bidirectional Data Bits/Address Bits
Address Bits
Clock Input (duty cycle must be 30% to 70%). Connect CLK to DV_DD to activate internal clock.
Chip-Select Input (active-low)
Write Input (active-low)
Read Input (active-low)
Conversion-Start input. Rising edge initiates sampling and conversion sequence.
Interrupt output. Falling edge indicates the end of a conversion sequence.
Analog Supply Voltage
Channel 4 Multiplexed Inputs (single-ended)
Channel 3 Multiplexed Inputs (single-ended)
1.6mA
TO OUTPUT
PIN
120pF
1.6V
1.0mA
Figure 1. Load Circuit for Access Time and Bus Relinquish Time
_______________Detailed Description
The MAX115/MAX116 use a successive-approximation
conversion technique and four simultaneous-sampling
track/hold (T/H) amplifiers to convert analog signals into
12-bit digital outputs. Each T/H has two multiplexed
inputs, allowing a total of eight inputs. Each T/H output
is converted and stored in memory to be accessed
sequentially by the parallel interface with successive
read cycles. The MAX115/MAX116 internal micro-
sequencer can be programmed to digitize one, two,
three, or four inputs sampled simultaneously from either
of the two banks of four inputs (Figure 2). The
MAX115/MAX116 can operate with either an external or
internal clock. For internal operation, connect CLK to
DV_DD.
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