MAX115-MAX116 Datasheet, PDF (11/14 Pages) Maxim Integrated Products – 2x4-Channel, Simultaneous-Sampling 12-Bit ADCs

2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
OUTPUT CODE
TO DAC
MAX115
MAX116
REFOUT 7 (2.5V)
4.7µF
A_V = 1
REFIN 6 (2.5V)
OUT
MAX6325
10k
2.5V
Figure 7. External Reference
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
100 . . . 001
100 . . . 000
- FS
ZERO
INPUT VOLTAGE (LSB)
MAX115: FS = 2 x VREFOUT, 1LSB = 4VREFOUT
4096
MAX116: FS = VREFOUT, 1LSB = 2VREFOUT
4096
Figure 8. Bipolar Transfer Function
+FS - 1LSB
Internal and External Reference
The MAX115/MAX116 can be used with an internal or
external reference voltage. An external +2.5 reference
can be connected directly at REFIN. An internal buffer
with a gain of +1 provides +2.5V at REFOUT.
Internal Reference
The full-scale range with the internal reference is ±5V
for the MAX115 and ±2.5V for the MAX116. Bypass
REFIN with a 0.1µF capacitor to AGND, and bypass the
REFOUT pin with a 4.7µF (min) capacitor to AGND
(Figure 6). The maximum value to compensate the ref-
erence buffer is 22µF. Larger values are acceptable if
low-ESR capacitors are used.
External Reference
For operation over a wide temperature range, an exter-
nal +2.5V reference with tighter specifications improves
accuracy. The MAX6325 is an excellent choice
to match the MAX115/MAX116 accuracy over the
commercial and extended temperature ranges with a
1ppm/°C (max) temperature drift. Connect an external
reference at REFIN as shown in Figure 7. The minimum
impedance is 7kΩ for DC currents in both normal oper-
ation and shutdown. Bypass REFOUT with a 4.7µF low-
ESR capacitor.
Power-On Reset
When power is first applied, the internal power-on reset
(POR) circuitry activates the MAX115/MAX116 with INT
= high, ready to convert. The default conversion mode
is Input Mux A/Single Channel Conversion. See the
Programming Modes section if other configurations are
desired.
After the power supplies have been stabilized, the reset
time is 5µs. No conversions should be performed
during this phase. At power-up, data-in memory is
undefined.
Software Power-Down
Software power-down is activated by setting bit A3 of
the control word high (Table 1). It is asserted after the
WR or CS rising edge, at which point the ADC immedi-
ately powers down to a low quiescent-current state.
I_AVDD and I_AVSS drop to less than 1µA (typ), and I_DVDD
drops to 13µA (typ). The ADC circuitry and reference
buffer are turned off, but the digital interface and the
reference remain active for fast power-up recovery.
Wake up the MAX115/MAX116 by writing a control
word (A0–A3, Table 1). The bidirectional interface inter-
prets a logic zero at A3 as the start signal, and powers
up in the mode selected by A0, A1, and A2. The refer-
ence buffer’s settling time and the bypass capacitor’s
value dominate the power-up delay. With the recom-
mended 4.7µF at REFOUT, the power-up delay is typi-
cally 20ms.
Transfer Function
The MAX115/MAX116 have bipolar input ranges. Figure
8 shows the bipolar/output transfer function. Code tran-
sitions occur at successive-integer least significant bit
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