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MAX11129_12 Datasheet, PDF (6/36 Pages) Maxim Integrated Products – 3Msps, Low-Power, Serial 12-/10-Bit,8-/16-Channel ADCs
MAX11129–MAX11132
3Msps, Low-Power, Serial 12-/10-Bit,
8-/16-Channel ADCs
ELECTRICAL CHARACTERISTICS (MAX11129/MAX11130) (continued)
(VDD = 2.35V to 3.6V, VOVDD = 1.5V to 3.6V, fSAMPLE = 3Msps, fSCLK = 48MHz, 50% duty cycle, VREF+ = VDD, TA = -40NC to +125NC,
unless otherwise noted. Typical values are at TA = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
DYNAMIC PERFORMANCE (500kHz, input sine wave) (Notes 3 and 7)
Signal-to-Noise Plus Distortion
SINAD
61
Signal-to-Noise Ratio
SNR
61
Total Harmonic Distortion
(Up to the 5th Harmonic)
THD
Spurious-Free Dynamic Range
SFDR
77
Intermodulation Distortion
Full-Power Bandwidth
IMD f1 = 398.4375kHz, f2 = 275.8125kHz
-3dB
-0.1dB
Full-Linear Bandwidth
SINAD > 59dB
Crosstalk
-0.5dB below full-scale of
492.1875kHz sine-wave input to the
channel being sampled; apply full-
scale 398.4375kHz sine wave signal
to all 15 nonselected input channels
CONVERSION RATE
Power-Up Time
Acquisition Time
Conversion Time
External Clock Frequency
Aperture Delay
tPU Conversion cycle, external clock
tACQ
Internally clocked (Note 8)
tCONV Externally clocked, fSCLK = 48MHz,
16 cycles (Note 8)
333
fSCLK
0.48
Aperture Jitter
RMS
ANALOG INPUT
Input Voltage Range
Absolute Input Voltage Range
VINA
Unipolar (single-ended and pseudo
differential)
0
RANGE bit set to 0
Bipolar (Note 9)
RANGE bit set to 1
AIN+, AIN- relative to GND
-VREF+/2
-VREF+
-0.1
Static Input Leakage Current
Input Capacitance
IILA
CAIN
VAIN_ = VDD, GND
During acquisition time,
RANGE bit = 0 (Note 10)
During acquisition time,
RANGE bit = 1 (Note 10)
TYP
MAX
UNITS
61.5
dB
61.5
dB
-86
-76
dB
86
dB
-83
dB
50
MHz
7.5
MHz
1.5
MHz
-88
dB
2
Cycles
52
ns
2.1
µs
ns
48
MHz
8
ns
30
ps
VREF+
V
+VREF+/2
+VREF+
VREF+ + 0.1 V
-0.1
FA
15
pF
7.5
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