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| MAX1106 Datasheet, PDF (6/16 Pages) Maxim Integrated Products – Single-Supply, Low-Power, Serial 8-Bit ADCs | |||
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Single-Supply, Low-Power,
Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICSâMAX1107 (continued)
(VDD = +4.5V to +5.5V; IN- = GND; fSCLK = 2MHz; 25ksps conversion rate; 1µF capacitor at REFOUT; external +4.096V reference at
REFIN; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
EXTERNAL REFERENCE
Input Voltage Range
Input Current
POWER REQUIREMENTS
Supply Voltage
SYMBOL
CONDITIONS
VREFIN
4.096V at REFIN, full scale
VDD
MIN TYP MAX UNITS
1.0
VDD + 0.05 V
1
20
µA
4.5
5
5.5
V
Supply Current (Notes 2, 7)
VDD = 5.5V, CL = 10pF,
IDD full-scale input
Power down, VDD = 4.5V to 5.5V
115
250
µA
0.5
2.5
Power-Supply Rejection (Note 8)
PSR
External reference = 4.096V,
full-scale input, VDD = 4.5V to 5.5V
DIGITAL INPUTS (SHDN, SCLK, and CONVST)
±0.4
±4
mV
Threshold Voltage High
Threshold Voltage Low
Input Hysteresis
Input Current High
Input Current Low
Input Capacitance
DIGITAL OUTPUT (DOUT)
VIH
VIL
VHYST
IIH
IIL
CIN
3
V
0.8
V
0.2
V
±1
µA
±1
µA
15
pF
Output High Voltage
VOH ISOURCE = 0.5mA
Output Low Voltage
ISINK = 5mA
VOL
ISINK = 16mA
Three-State Leakage Current
IL
Figure 6, DOUT High-Z
Three-State Output Capacitance COUT Figure 6, DOUT High-Z
TIMING CHARACTERISTICS (Figures 6 and 7)
VDD - 0.5
V
0.4
V
0.8
±0.01 ±10
µA
15
pF
Acquisition Time
CONVST Pulse Width High
tACQ
tCSPW
1
µs
1
µs
CONVST Fall to Output Data
Valid
tCONV
35
µs
CONVST Rise to Output Enable
SCLK Fall to Output Data Valid
SCLK Pulse Width High
tDV Figure 1, CLOAD = 100pF
tDO Figure 1, CLOAD = 100pF
tCH
240
ns
20
200
ns
200
ns
6 _______________________________________________________________________________________
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