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MAX16046A Datasheet, PDF (59/71 Pages) Maxim Integrated Products – 12-Channel/8-Channel EEPROM-Programmable System Managers with Nonvolatile Fault Registers
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
LOAD ADDRESS: This is an extension to the standard
IEEE 1149.1 instruction set to support access to the
memory in the MAX16046A/MAX16048A. When the
LOAD ADDRESS instruction latches into the instruction
register, TDI connects to TDO through the 8-bit memory
address test data register during the shift-DR state.
READ DATA: This is an extension to the standard IEEE
1149.1 instruction set to support access to the memory
in the MAX16046A/MAX16048A. When the READ
instruction latches into the instruction register, TDI con-
nects to TDO through the 8-bit memory read test data
register during the shift-DR state.
WRITE DATA: This is an extension to the standard
IEEE 1149.1 instruction set to support access to the
memory in the MAX16046A/MAX16048A. When the
WRITE instruction latches into the instruction register,
TDI connects to TDO through the 8-bit memory write
test data register during the shift-DR state.
REBOOT: This is an extension to the standard IEEE
1149.1 instruction set to initiate a software controlled
reset to the MAX16046A/MAX16048A. When the
REBOOT instruction latches into the instruction register,
the MAX16046A/MAX16048A resets and immediately
begins the boot-up sequence.
SAVE: This is an extension to the standard IEEE 1149.1
instruction set that triggers a fault log. The current ADC
conversion results along with fault information are
saved to EEPROM depending on the configuration of
the Critical Fault Log Control register (r47h).
SETEXTRAM: This is an extension to the standard
IEEE 1149.1 instruction set that allows access to the
extended page. Extended registers include ADC con-
version results, DACOUT enables, and GPIO input/out-
put data.
RSTEXTRAM: This is an extension to the standard IEEE
1149.1 instruction set. Use RSTEXTRAM to return to the
default page and disable access to the extended page.
SETEEPADD: This is an extension to the standard
IEEE 1149.1 instruction set that allows access to the
EEPROM page. Once the SETEEPADD command has
been sent, all addresses are recognized as EEPROM
addresses only.
RSTEEPADD: This is an extension to the standard IEEE
1149.1 instruction set. Use RSTEEPADD to return to the
default page and disable access to the EEPROM.
Applications Information
Unprogrammed Device Behavior
When the EEPROM has not been programmed using
the JTAG or I2C interface, the default configuration of
the EN_OUT_ outputs is open-drain active-low. If it is
necessary to hold an EN_OUT_ high or low to prevent
premature startup of a power supply before the
EEPROM is programmed, connect a resistor to ground
or the supply voltage. Avoid connecting a resistor to
ground if the output is to be configured as open-drain
with a separate pullup resistor.
Device Behavior at Power-Up
When VCC is ramped from 0V, the RESET output is high
impedance until VCC reaches 1.4V, at which point it is
driven low. All other outputs are high impedance until
VCC reaches 2.85V, when the EEPROM contents are
copied into register memory, and after which the out-
puts assume their programmed states.
Margining Power Supplies
The MAX16046A/MAX16048A can margin or shift the
voltages on external power supplies to facilitate proto-
typing or manufacturing tests. There are several differ-
ent ways to margin power supplies: One method feeds
a current into the feedback node of a DC-DC converter
or LDO, and another method feeds a current into the
trim input on a DC-DC module.
Feedback Method
See Figure 15 for the connections of the MAX16046A/
MAX16048A to a power supply using the feedback
node method. The output voltage, VOUT, can be calcu-
lated using the following formula:
VOUT
=
⎛
VREF ⎝⎜⎜1+
R1
R3
+
R1
R2
⎞
⎠⎟⎟
−
R1
R3
VDACOUT_
where VREF is the internal reference voltage of the
power supply and VDACOUT_ is the output voltage of
the MAX16046A/MAX16048A DACOUT_ output.
Select R1 and R2 to obtain the desired output voltage
with no trim in effect (VDACOUT_ = VREF). Set the DAC
range bits such that VREF falls approximately halfway
within the DACOUT_ output range (see the DAC
Outputs section). The resistor, R3, varies the amount of
control that the DACOUT_ voltage has on the output
voltage of the power supply. Large values of R3 corre-
spond to a higher degree of resolution control over the
output voltage, and small values of R3 correspond to a
lesser degree of resolution control.
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