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MAX11359A_12 Datasheet, PDF (54/67 Pages) Maxim Integrated Products – 16-Bit Data-Acquisition System with ADC, DAC, UPIOs, RTC, Voltage Monitors, and Temp Sensor
MAX11359A
16-Bit Data-Acquisition System with ADC, DAC,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
IMSK Register (Power-On State: 1111 011X 1111 1111)
MSB
MLDVD
MLCPD
MADO
MSDC
MCRDY
MUPR4
MUPR3
MUPR2
MUPR1
MUPF4
MADD
MUPF3
MALD
MUPF2
X
LSB
MUPF1
The IMSK register determines which bits of the STATUS
register generate an interrupt on INT. The bits in this
register do not mask output signals routed to UPIO
since the output signals are masked by disabling that
UPIO function.
MLDVD: LDVD status bit mask. Set MLDVD = 0 to
enable the LDVD status bit interrupt to INT, and set
MLDVD = 1 to mask the LDVD status bit interrupt. The
power-on default value is 1.
MLCPD: LCP status bit mask. Set MLCPD = 0 to
enable the LCP status bit interrupt to INT, and set
MLCPD = 1 to mask the LCP status bit interrupt. The
power-on default value is 1.
MADO: ADO status bit mask. Set MADO = 0 to enable
the ADO status bit interrupt to INT, and set MADO = 1
to mask the ADO status bit interrupt. The power-on
default value is 1.
MSDC: SDC status bit mask. Set MSDC = 0 to enable
the SDC status bit interrupt to INT, and set MSDC = 1
to mask the SDC status bit interrupt. The power-on
default value is 1.
MCRDY: CRD status bit mask. Set MCRDY = 0 to
enable the CRDY status bit interrupt to INT, and set
MCRDY = 1 to mask the CRDY status bit interrupt. The
power-on default value is 0.
MADD: ADD status bit mask. Set MADD = 0 to enable
the ADD status bit interrupt to INT, and set MADD = 1
to mask the ADD status bit interrupt. The power-on
default value is 1.
MALD: ALD status bit mask. Set MALD = 0 to enable
the ALD status bit interrupt to INT, and set MALD = 1 to
mask the ALD status bit interrupt. The power-on default
value is 1.
MUPR<4:1>: UPR<4:1> status bits mask. Set MUPR_ =
0 to enable the UPR_ status bit interrupt to INT, and set
MUPR_ = 1 to mask the UPR_ status bit interrupt. (_ =
1, 2, 3, or 4 and corresponds to the UPIO1, UPIO2,
UPIO3, or UPIO4 pins, respectively.) The power-on
default value is F hex.
MUPF<4:1>: UPF<4:1> status bits mask. Set MUPF_ =
0 to enable the UPF_ status bit interrupt to INT, and set
MUPF_ = 1 to mask the UPF_ status bit interrupt. (_ = 1,
2, 3, or 4 and corresponds to the UPIO1, UPIO2,
UPIO3, or UPIO4 pins, respectively.) The power-on
default value is F hex.
PS_VMONS Register (Power-On State: 0010 01XX)
MSB
LSB
LDOE
CPE
LSDE
CPDE
HYSE
RSTE
X
X
This register is the power-supply and voltage monitors
control register.
LDOE: Low-dropout linear-regulator enable bit. Set
LDOE = 1 to enable the low-dropout linear regulator to
provide the internal source voltage for the charge
pump. Set LDOE = 0 to disable the LDO, allowing an
external drive to the charge-pump input through REG.
The power-on default value is 0.
CPE: Charge-pump enable bit. Set CPE = 1 to enable the
charge-pump doubler, and set CPE = 0 to disable the
charge-pump doubler. The power-on default value is 0.
LSDE: DVDD low-supply voltage-detector power-
enable bit. Set LSDE = 1 to enable the +1.8V (DVDD)
low-supply-voltage detector, and set LSDE = 0 to
disable the DVDD low-supply-voltage detector. The
power-on default value is 1.
CPDE: CPOUT low-supply voltage-detector power-
enable bit. Set CPDE = 1 to enable the +2.7V CPOUT
low-supply voltage-detector comparator, and set CPDE
= 0 to disable the CPOUT low-supply voltage-detector
comparator. The power-on default value is 0.
HYSE: DVDD low-supply voltage-detector hysteresis-
enable bit. Set HYSE = 1 to set the hysteresis for the
+1.8V (DVDD) low-supply-voltage detector to +200mV,
and set HYSE = 0 to set the hysteresis to +20mV. On initial
power-up, the hysteresis is +20mV and can be pro-
grammed to 200mV once RESET goes high. Once pro-
grammed to +200mV, the DVDD falling threshold is +1.8V
nominally and the rising threshold is +2.0V nominally. The
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Maxim Integrated