MAX154 Datasheet, PDF (5/12 Pages) Maxim Integrated Products – CMOS High-Speed 8-Bit ADCs with Multiplexer and Reference

CMOS High-Speed 8-Bit ADCs with
Multiplexer and Reference
_____________________________________________________________Pin Descriptions
PIN
MAX154
NAME
FUNCTION
PIN
MAX158
NAME
FUNCTION
1
AIN4 Analog Input Channel 4
2
AIN3 Analog Input Channel 3
3
AIN2 Analog Input Channel 2
4
AIN1 Analog Input Channel 1
5 REF OUT Reference Output (2.5V) for MAX154
6
DBO Three-State Data Output, bit 0 (LSB)
7
DB1
Three-State Data Output, bit 1
8
DB2
Three-State Data Output, bit 2
9
DB3
Three-State Data Output, bit 3
10
RD
Read Input. RD controls conversions and
data access. See Digital Interface section.
Interrupt Output. INT going low indi-
11
INT
cates the completion of a conversion.
See Digital Interface section.
12
GND Ground
Lower Limit of Reference Span. Sets
13
V_REF- the zero-code voltage.
Range: GND to V_REF+.
Upper Limit of Reference Span. Sets
14
V_REF+ the full-scale input voltage.
Range: V_REF- to V_DD.
Ready Output. Open-drain output with
15
RDY
no active pull-up device. Goes low
when CS goes low and high imped-
ance at the end of a conversion.
16
CS
Chip-Select Input. CS must be low for
the device to be selected.
17
DB4
Three-State Data Output, bit 4
18
DB5
Three-State Data Output, bit 5
19
DB6
Three-State Data Output, bit 6
20
DB7
Three-State Data Output, bit 7 (MSB)
21
A1
Channel Address 1 Input
22
A0
Channel Address 0 Input
23
NC
No Connect
24
V_DD
Power-Supply Voltage, +5V
1
AIN6 Analog Input Channel 6
2
AIN5 Analog Input Channel 5
3
AIN4 Analog Input Channel 4
4
AIN3 Analog Input Channel 3
5
AIN2 Analog Input Channel 2
6
AIN1 Analog Input Channel 1
7
REF OUT Reference Output (2.5V) for MAX158
8
DB0
Three-State Data Output, bit 0 (LSB)
9
DB1
Three-State Data Output, bit 1
10
DB2
Three-State Data Output, bit 2
11
DB3
Three-State Data Output, bit 3
Read Input. RD controls conversions
12
RD
and data access.
See Digital Interface section.
Interrupt Output. INT going low indi-
13
INT
cates the completion of a conversion.
See Digital Interface section.
14
GND Ground
Lower Limit of Reference Span. Sets
15
V_REF- the zero-code voltage.
Range: GND to V_REF+.
Upper Limit of Reference Span. Sets
16
V_REF+ the full-scale input voltage.
Range: V_REF- to V_DD.
Ready Output. Open-drain output with
17
RDY
no active pull-up device. Goes low
when CS goes low and high imped-
ance at the end of a conversion.
18
CS
Chip-Select input. C– S must be low for
the device to be selected.
19
DB4
Three-State Data Output, bit 4
20
DB5
Three-State Data Output, bit 5
21
DB6
Three-State Data Output, bit 6
22
DB7
Three-State Data Output, bit 7 (MSB)
23
A2
Channel Address 2 Input
24
A1
Channel Address 1 Input
25
A0
Channel Address 0 Input
26
V_DD
Power-Supply Voltage, +5V
27
AIN8 Analog Input Channel 8
28
AIN7 Analog Input Channel 7
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