MAX1434_11 Datasheet, PDF (5/22 Pages) Maxim Integrated Products – Octal, 12-Bit, 50Msps, 1.8V ADC with Serial LVDS Outputs

Octal, 10-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
ELECTRICAL CHARACTERISTICS (continued)
(V_AVDD = 1.8V, V_OVDD = 1.8V, V_CVDD = 3.3V, V_GND = 0V, external V_REFIO = 1.24V, C_REFIO = 0.1µF, C_REFP = 10µF, C_REFN = 10µF,
f_CLK = 50MHz (50% duty cycle), V_DT = 0V, T_A = T_MIN to T_MAX, unless otherwise noted. Typical values are at T_A = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
TIMING CHARACTERISTICS (Note 8)
CONDITIONS
Data Valid to CLKOUT Rise/Fall
t_OD Figure 5 (Note 9)
CLKOUT Output-Width High
CLKOUT Output-Width Low
FRAME Rise to CLKOUT Rise
t_CH Figure 5
t_CL Figure 5
t_CF Figure 4 (Note 9)
MIN
TYP
MAX UNITS
(t_SAMPLE /20) (t_SAMPLE /20)
ns
- 0.15
+ 0.15
t_SAMPLE /10
ns
t_SAMPLE /10
ns
(t_SAMPLE /20) (t_SAMPLE /20)
ns
- 0.15
+ 0.15
Sample CLK Rise to FRAME Rise
t_SF Figure 4 (Note 9)
(3t_SAMPLE /5) (3t_SAMPLE /5)
+ 1.1
+ 2.6
ns
Crosstalk
(Note 4)
-94
dB
Gain Matching
Phase Matching
C_GM
C_PM
f_IN = 5.3MHz (Note 4)
f_IN = 5.3MHz (Note 4)
±0.1
±0.25
dB
Degrees
Note 2: Specifications at T_A ≥ +25°C are guaranteed by production testing. Specifications at T_A < +25°C are guaranteed by design
and characterization and not subject to production testing.
Note 3: All capacitances are between the indicated pin and GND, unless otherwise noted.
Note 4: See definition in the Parameter Definitions section at the end of this data sheet.
Note 5: See the Common-Mode Output (CMOUT) section.
Note 6: Connect REFADJ to GND directly to enable internal reference mode. Connect REFADJ to AVDD directly to disable the inter-
nal bandgap reference and enable external reference mode.
Note 7: Measured using C_REFP to GND = 1µF and C_REFN to GND = 1µF. t_ENABLE time may be lowered by using smaller capacitor values.
Note 8: Data valid to CLKOUT rise/fall timing is measured from 50% of data output level to 50% of clock output level.
Note 9: Guaranteed by design and characterization. Not subject to production testing.
Typical Operating Characteristics
(V_AVDD = 1.8V, V_OVDD = 1.8V, V_CVDD = 3.3V, V_GND = 0V, internal reference, differential input at -0.5dBFS, f_IN = 5.3MHz, f_CLK = 50MHz
(50% duty cycle), V_DT = 0V, C_LOAD = 10pF, T_A = +25°C, unless otherwise noted.)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
FFT PLOT
(16,384-POINT DATA RECORD)
f_CLK = 50.1523789MHz
f_IN = 5.304814MHz
A_IN = -0.5dBFS
SNR = 61.146dB
SINAD = 61.139dB
THD = -89.316dBc
SFDR = 84.455dBc
HD2 HD3
5
10
15
20
25
FREQUENCY (MHz)
FFT PLOT
(16,384-POINT DATA RECORD)
0
-10
f_CLK = 50.152379MHz
f_IN = 24.0997119MHz
-20 ^AIN ^{= -0.5dBFS}
SNR = 61.118dB
-30 _{SINAD = 61.112dB}
-40 ^{THD = -91.363dBc}
SFDR = 85.069dBc
-50
-60
-70
HD2
HD3
-80
-90
-100
0
5
10
15
20
25
FREQUENCY (MHz)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
CROSSTALK
(16,384-POINT DATA RECORD)
MEASURED ON CHANNEL 1,
WITH INTERFERING SIGNAL
ON CHANNEL 2
f_IN(IN1) = 5.304814MHz
f_IN(IN2) = 24.0997119MHz
CROSSTALK = 94dB
f_IN(IN2)
5
10
15
20
25
FREQUENCY (MHz)
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