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MAX1434_11 Datasheet, PDF (3/22 Pages) Maxim Integrated Products – Octal, 12-Bit, 50Msps, 1.8V ADC with Serial LVDS Outputs
Octal, 10-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = 1.8V, VOVDD = 1.8V, VCVDD = 3.3V, VGND = 0V, external VREFIO = 1.24V, CREFIO = 0.1µF, CREFP = 10µF, CREFN = 10µF,
fCLK = 50MHz (50% duty cycle), VDT = 0V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 2, 3)
PARAMETER
Effective Number of Bits
Spurious-Free Dynamic Range
Total Harmonic Distortion
Intermodulation Distortion
Third-Order Intermodulation
Aperture Jitter
Aperture Delay
Small-Signal Bandwidth
Full-Power Bandwidth
Output Noise
SYMBOL
CONDITIONS
ENOB fIN = 5.3MHz at -0.5dBFS
fIN = 19.3MHz at -0.5dBFS
SFDR
fIN = 5.3MHz at -0.5dBFS
fIN = 19.3MHz at -0.5dBFS
THD
fIN = 5.3MHz at -0.5dBFS
fIN = 19.3MHz at -0.5dBFS
IMD f1 = 5.3MHz at -6.5dBFS
f2 = 6.3MHz at -6.5dBFS
IM3 f1 = 5.3MHz at -6.5dBFS
f2 = 6.3MHz at -6.5dBFS
tAJ Figure 11
tAD Figure 11
SSBW Input at -20dBFS
LSBW Input at -0.5dBFS
IN_P = IN_N
Over-Range Recovery Time
tOR RS = 25Ω, CS = 50pF
INTERNAL REFERENCE
REFADJ Internal Reference-Mode
Enable Voltage
REFADJ Low-Leakage Current
REFIO Output Voltage
Reference Temperature
Coefficient
VREFIO
TCREFIO
EXTERNAL REFERENCE
REFADJ External Reference-
Mode Enable Voltage
REFADJ High-Leakage Current
REFIO Input Voltage
REFIO Input Voltage Tolerance
REFIO Input Current
IREFIO
COMMON-MODE OUTPUT (CMOUT)
CMOUT Output Voltage
CLOCK INPUT (CLK)
VCMOUT
(Note 6)
(Note 6)
Input High Voltage
VCLKH
Input Low Voltage
Clock Duty Cycle
Clock Duty-Cycle Tolerance
VCLKL
MIN
TYP
MAX UNITS
9.9
dB
9.9
84
dBc
77
85
-89
dBc
-91
-77
86.0
dBc
92.9
< 0.4
1
100
100
0.058
1
dBc
psRMS
ns
MHz
MHz
LSBRMS
Clock
cycle
0.1
V
1.5
mA
1.18
1.24
1.30
V
120
ppm/°C
VAVDD -
V
0.1
200
µA
1.24
V
±5
%
<1
µA
0.76
V
0.8 x
V
VAVDD
0.2 x
V
VAVDD
50
%
±30
%
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