MAX1434_11 Datasheet, PDF (4/22 Pages) Maxim Integrated Products – Octal, 12-Bit, 50Msps, 1.8V ADC with Serial LVDS Outputs

Octal, 10-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
ELECTRICAL CHARACTERISTICS (continued)
(V_AVDD = 1.8V, V_OVDD = 1.8V, V_CVDD = 3.3V, V_GND = 0V, external V_REFIO = 1.24V, C_REFIO = 0.1µF, C_REFP = 10µF, C_REFN = 10µF,
f_CLK = 50MHz (50% duty cycle), V_DT = 0V, T_A = T_MIN to T_MAX, unless otherwise noted. Typical values are at T_A = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
Input Leakage Current
Input at GND
DI_{IN Input at AVDD}
Input Capacitance
DC_IN
DIGITAL INPUTS (PLL_, LVDSTEST, DT, SLVS, PD, T/B)
Input Logic-High Voltage
V_IH
MIN
TYP
5
0.8 x
V_AVDD
Input Logic-Low Voltage
V_IL
Input Leakage Current
Input at GND
DI_{IN Input at AVDD}
Input Capacitance
DC_IN
5
LVDS OUTPUTS (OUT_P, OUT_N), SLVS/LVDS = 0
Differential Output Voltage
V_OHDIFF R_TERM = 100Ω
250
Output Common-Mode Voltage
V_OCM R_TERM = 100Ω
1.125
Rise Time (20% to 80%)
t_RL
R_TERM = 100Ω, C_LOAD = 5pF
350
Fall Time (80% to 20%)
t_FL
R_TERM = 100Ω, C_LOAD = 5pF
350
SLVS OUTPUTS (OUT_P, OUT_N, CLKOUTP, CLKOUTN, FRAMEP, FRAMEN), SLVS/LVDS = 1, DT = 1
Differential Output Voltage
V_OHDIFF R_TERM = 100Ω
205
Output Common-Mode Voltage
V_OCM R_TERM = 100Ω
220
Rise Time (20% to 80%)
t_RS
R_TERM = 100Ω, C_LOAD = 5pF
320
Fall Time (80% to 20%)
t_FS
R_TERM = 100Ω, C_LOAD = 5pF
320
POWER-DOWN
PD Fall to Output Enable
t_ENABLE (Note 7)
100
PD Rise to Output Disable
t_DISABLE
20
POWER REQUIREMENTS
AVDD Supply Voltage Range
OVDD Supply Voltage Range
CVDD Supply Voltage Range
V_AVDD
V_OVDD
V_CVDD
PD = 0
1.7
1.8
1.7
1.8
1.7
1.8
348
AVDD Supply Current
I_AVDD
f_IN = 19.3MHz ^{PD = 0, DT = 1}
at -0.5dBFS _{PD = 1, power-down,}
no clock input
348
1.54
PD = 0
78
OVDD Supply Current
I_OVDD
f_IN = 19.3MHz ^{PD = 0, DT = 1}
at -0.5dBFS _{PD = 1, power-down,}
no clock input
100
566
MAX
5
80
UNITS
µA
pF
V
0.2 x
V_AVDD
V
5
µA
80
pF
450
mV
1.375
mV
ps
ps
mV
mV
ps
ps
ms
ns
1.9
V
1.9
V
3.6
V
390
mA
mA
100
mA
µA
CVDD Supply Current
Power Dissipation
I_CVDD
P_DISS
CVDD is used only to bias ESD-protection
diodes on CLK input, Figure 2
f_IN = 19.3MHz at -0.5dBFS
0
mA
767
882
mW
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