MAX1167_09 Datasheet, PDF (5/30 Pages) Maxim Integrated Products – Multichannel, 16-Bit, 200ksps Analog-to-Digital Converters

Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
TIMING CHARACTERISTICS (Figures 1, 2, 8, and 16)
(AV_DD = DV_DD = +4.75V to +5.25V, f_SCLK = 4.8MHz external clock (50% duty cycle), 24 clocks/conversion (200ksps), external
V_REF = +4.096V, T_A = T_MIN to T_MAX, unless otherwise noted. Typical values are at T_A = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Acquisition Time
t_ACQ External clock (Note 6)
729
ns
SCLK to DOUT Valid
CS Fall to DOUT Enable
t_DO
C_DOUT = 30pF
t_DV
C_DOUT = 30pF
50
ns
80
ns
CS Rise to DOUT Disable
CS Pulse Width
t_TR
t_CSW
C_DOUT = 30pF
80
ns
100
ns
CS to SCLK Setup
t_CSS
SCLK rise
SCLK fall (DSP)
100
ns
CS to SCLK Hold
t_CSH
SCLK rise
SCLK fall (DSP)
0
ns
Conversion
93
SCLK High Pulse Width
t_CH
Duty cycle 45% to 55%
Data transfer
50
ns
Conversion
93
SCLK Low Pulse Width
t_CL
Duty cycle 45% to 55%
ns
Data transfer
50
SCLK Period
t_CP
209
ns
DIN to SCLK Setup
SCLK rise
t_DS
SCLK fall (DSP)
50
ns
DIN to SCLK Hold
SCLK rise
t_DH
SCLK fall (DSP)
0
ns
CS Falling to DSPR Rising
t_DF
DSPR to SCLK Falling Setup
t_FSS
100
ns
100
ns
DSPR to SCLK Falling Hold
t_FSH
0
ns
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