MAX1011 Datasheet, PDF (5/12 Pages) Maxim Integrated Products – Low-Power, 90Msps, 6-Bit ADC

Low-Power, 90Msps, 6-Bit ADC
PIN
1
2
3
4
5
6
7
8
9, 10,
12, 13
11
14
15
16
17
18
19–24
NAME
GAIN
OCC+
OCC-
IN+
IN-
V_CC
TNK+
TNK-
GND
V_CC
V_CC
N.C.
OGND
V_CCO
DCLK
D0–D5
Pin Description
FUNCTION
Gain-Select Input. Sets input full-scale range: 125/250/500mVp-p (Table 1).
Positive Offset-Correction Compensation. Connect a 0.22µF capacitor for AC-coupled inputs. Ground
pin 2 for DC-coupled inputs.
Negative Offset-Correction Compensation. Connect a 0.22µF capacitor for AC-coupled inputs. Ground
pin 3 for DC-coupled inputs.
Noninverting Analog Input
Inverting Analog Input
+5V ±5% Supply. Bypass with a 0.01µF capacitor to GND (pin 9).
Positive Oscillator/Clock Input
Negative Oscillator/Clock Input
Analog Ground
+5V ±5% Supply. Bypass with a 0.01µF capacitor to GND (pin 10).
+5V ±5% Supply. Bypass with a 0.01µF capacitor to GND (pin 13).
No Connection
Digital Output Ground
Digital Output Supply, +3.3V ±300mV. Bypass with a 47pF capacitor to OGND (pin 16).
Digital Clock Output. Frames the output data.
Digital Outputs 0–5. D5 is the most significant bit (MSB).
_______________Detailed Description
Converter Operation
The MAX1011 integrates a 6-bit analog-to-digital con-
verter (ADC), a buffered voltage reference, and oscilla-
tor circuitry. The ADC uses a flash conversion technique
to convert an analog input signal into a 6-bit parallel
digital output code. The MAX1011’s unique design
includes 63 fully differential comparators and a propri-
etary encoding scheme that ensures no more than
1LSB dynamic encoding error. The control logic inter-
faces easily to most digital signal processors (DSPs)
and microprocessors (µPs) with +3.3V CMOS-compati-
ble logic interfaces. Figure 1 shows the MAX1011 in a
typical application.
Programmable Input Amplifier
The MAX1011 has a programmable-gain input amplifier
with a -0.5dB bandwidth of 55MHz and a true differen-
tial input. To maximize performance in high-speed
systems, the amplifier has less than 3pF of input
capacitance. The input amplifier gain is programmed
via the GAIN pin to provide three possible input full-
scale ranges (FSRs) as shown in Table 1.
Single-ended and differential AC-coupled input circuit
examples are shown in Figures 2 and 3. Each of the
Table 1. Input Amplifier Programming
GAIN
GND
Open
V_CC
INPUT FULL-SCALE RANGE
(mVp-p)
500
250
125
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