DS1318 Datasheet, PDF (4/15 Pages) Dallas Semiconductor – Parallel-Interface Elapsed Time Counter

Parallel-Interface Elapsed Time Counter
A0–A4
CE
OE
DQ0–DQ7
Read Cycle Timing
t_RC
t_AA
t_CEA
t_CEL
t_OEA
t_OEL
t_CEZ
t_OH
t_OEZ
VALID
A0–A4
CE
WE
DQ0–DQ7
Write Cycle Timing, Write-Enable Controlled
t_WC
VALID
t_AS
VALID
t_AH
t_AS
t_WEW
t_WR
t_WEZ
DATA OUTPUT
t_DS
t_DH
DATA INPUT
DATA INPUT
A0–A4
CE
WE
DQ0–DQ7
Write Cycle Timing, Chip-Enable Controlled
t_WC
VALID
t_AS
t_CEW
VALID
t_AH
t_AS
t_WR
t_DS
t_DH
DATA INPUT
DATA INPUT
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