English
Language : 

MAX1221 Datasheet, PDF (33/44 Pages) Maxim Integrated Products – 12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports
12-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
and forces them to a high-impedance state. DAC out-
puts 0 and 1 remain in their previous state.
Output-Data Format
Figures 6–9 illustrate the conversion timing for the
MAX1221/MAX1223/MAX1343. All 12-bit conversion
results are output in 2-byte format, MSB first, with four
leading zeros. Data appears on DOUT on the falling
edges of SCLK. Data is binary for unipolar mode and
two’s complement for bipolar mode and temperature
results. See Figures 3, 4, and 5 for input/output and
temperature-transfer functions.
ADC Transfer Functions
Figure 3 shows the unipolar transfer function for single-
ended or differential inputs. Figure 4 shows the bipolar
transfer function for differential inputs. Code transitions
occur halfway between successive-integer LSB values.
Output coding is binary, with 1 LSB = VREF1 / 4096 for
unipolar and bipolar operation, and 1 LSB = +0.125°C
for temperature measurements. Bipolar true-differential
results and temperature-sensor results are available in
two’s complement format, while all others are in binary.
See Tables 6, 7, and 8 for details on which setting
(unipolar or bipolar) takes precedence.
In unipolar mode, AIN+ can exceed AIN- by up to
VREF1. In bipolar mode, either input can exceed the
other by up to VREF1 / 2.
Partial Reads and Partial Writes
If the first byte of an entry in the FIFO is partially read
(CS is pulled high after fewer than eight SCLK cycles),
the remaining bits are lost for that byte. The next byte of
data that is read out contains the next 8 bits. If the first
byte of an entry in the FIFO is read out fully, but the
second byte is read out partially, the rest of that byte is
lost. The remaining data in the FIFO is unaffected and
can be read out normally after taking CS low again, as
long as the 4 leading bits (normally zeros) are ignored.
If CS is pulled low before EOC goes low, a conversion
may not be completed and the FIFO data may not be
correct. Incorrect writes (pulling CS high before com-
pleting eight SCLK cycles) are ignored and the register
remains unchanged.
011....111
011....110
011....101
000....001
000....000
111....111
VREF = VREF+ - VREF-
VREF
VREF
FS = VREF / 2 + VCOM
ZS = COM
-FS = -VREF / 2
VREF
1 LSB = VREF / 4096
(COM)
VREF
100....011
100....010
100....001
100....000
-FS
-1 0 +1
+FS - 1 LSB
(COM)
INPUT VOLTAGE (LSB)
Figure 4. Bipolar Transfer Function—Full Scale (±FS) = ±VREF / 2
111....111
111....110
111....101
FS = VREF
FULL-SCALE
TRANSITION
1 LSB = VREF / 4096
000....011
000....010
000....001
000....000
01 2 3
FS
INPUT VOLTAGE (LSB)
FS - 3/2 LSB
OUTPUT CODE
011....111
011....110
000....010
000....001
000....000
111....111
111....110
111....101
100....001
100....000
-256
0
TEMPERATURE (°C)
+255.5
Figure 3. Unipolar Transfer Function—Full Scale (FS) = VREF
Figure 5. Temperature Transfer Function
______________________________________________________________________________________ 33