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MAX1530_09 Datasheet, PDF (30/33 Pages) Maxim Integrated Products – Multiple-Output Power-Supply Controllers for LCD Monitors
Multiple-Output Power-Supply
Controllers for LCD Monitors
amount of ripple after the PC board layout has been
optimized, consider increasing output capacitance.
Adding more capacitance does not eliminate the ripple,
but proportionally reduces the amplitude of the ripple. If
increasing the output capacitance is not desirable
because of space or cost concerns, then consider
slowing the turn-on of the step-down DC-to-DC
MOSFETs. Slower turn-on leads to smoother LX rising
and falling edges and consequently reduces the
switching noise. When slowing down MOSFET turn-on,
ensure the turn-off time is not affected. Otherwise, the
adaptive dead-time circuitry may not work properly and
shoot-through may occur. See the MOSFET Gate
Drivers section for details on how to slow down the
turn-on of both DH and DL.
Stability Requirements
The MAX1530/MAX1531 linear-regulator controllers use
an internal transconductance amplifier to drive an
external pass transistor. The transconductance amplifi-
er, the pass transistor, the base-emitter resistor, and
the output capacitor determine loop stability. The fol-
lowing applies equally to all linear regulators in the
MAX1530 and MAX1531. Any differences are highlight-
ed where appropriate.
The transconductance amplifier regulates the output
voltage by controlling the pass transistor’s base cur-
rent. The total DC loop gain is approximately:
AV(LR)
≈
⎛
⎝⎜
4
VT
⎞
⎠⎟
×
⎛
⎝⎜1+
IBIAS × hFE
ILOAD
⎞
⎠⎟
×
VREF
where VT is 26mV at room temperature, ILOAD is the
output current of the linear regulator, VREF is the linear
regulator’s internal reference voltage, and IBIAS is the
current through the base-to-emitter resistor (RBE). Each
of the linear regulator controllers is designed for a dif-
ferent maximum output current so they have different
output drive currents and different bias currents (IBIAS).
Each controller’s bias current can be found in the
Electrical Characteristics. The current listed in the
Conditions column for the FBL_ regulation voltage
specification is the individual controller’s bias current.
The base-to-emitter resistor for each controller should
be chosen to set the correct IBIAS:
RBE
=
VBE
IBIAS
The output capacitor and the load resistance create the
dominant pole in the system. However, the internal
amplifier delay, the pass transistor’s input capacitance,
and the stray capacitance at the feedback node create
additional poles in the system, and the output capacitor’s
ESR generates a zero. For proper operation, use the fol-
lowing steps to ensure the linear regulator’s stability:
1) First, calculate the dominant pole set by the linear
regulator’s output capacitor and the load resistor:
fPOLE(LR)
=
1
2πCLRRLOAD
where CLR is the output capacitance of the linear
regulator and RLOAD is the load resistance corre-
sponding to the maximum load current.
The unity-gain crossover of the linear regulator is:
fCROSSOVER = AV(LDO)f POLE(LDO)
2) The pole created by the internal amplifier delay is
about 1MHz:
fPOLE(AMP) ≅ 1MHz
3) Next, calculate the pole set by the transistor’s input
capacitance, the transistor’s input resistance, and
the base-to-emitter pullup resistor:
fPOLE(CIN)
=
1
2πCIN(RBE
|| RIN)
where
CIN
=
gm
2πfT
,
RIN
=
Rπ
=
hFE
gm
,
gm
is
the
transconductance of the pass transistor, and fT is the
transition frequency. Both parameters can be found
in the transistor’s data sheet.
Because RBE is much greater than RIN, the above
equation can be simplified:
fPOLE(CIN)
≈
1
2πCINRIN
The equation can be further simplified:
fPOLE(CIN)
=
fT
hFE
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