English
Language : 

MAX1530_09 Datasheet, PDF (19/33 Pages) Maxim Integrated Products – Multiple-Output Power-Supply Controllers for LCD Monitors
Multiple-Output Power-Supply Controllers for
LCD Monitors
The ILIM pin is a dual-mode input. When ILIM is con-
nected to VL, a default low-side current limit of 250mV
(typ) is used. If ILIM is connected to a voltage between
250mV and 3V, the low-side current limit is typically
1/5th the ILIM voltage.
The MAX1530/MAX1531s’ current limits are compara-
tively inaccurate, since the maximum load current is a
function of the MOSFETs’ on-resistances and the induc-
tor value, as well as the accuracy of the two thresholds.
However, using MOSFET current sensing reduces both
cost and circuit size and increases efficiency, since
sense resistors are not needed.
MOSFET Gate Drivers (DH, DL)
The DH and DL drivers are optimized for driving mod-
erate-size high-side and low-side MOSFETs. Adaptive
dead-time circuits monitor the DL and DH drivers and
prevent either FET from turning on until the other is fully
off. This algorithm allows operation without shoot-
through with a wide range of MOSFETs, minimizing
delays and maintaining efficiency. When the gates are
turning off, there must be low-resistance, low-induc-
tance paths from the gate drivers to the MOSFET gates
for the adaptive dead-time circuit to work properly.
Otherwise, the sense circuitry in the MAX1530/
MAX1531 interpret the MOSFET gate as "off" while gate
charge actually remains. Use short, wide traces mea-
suring less than 50 squares (at least 20 mil wide if the
MOSFET is 1in from the device).
It is advantageous to slow down the turn-on of both
gate drivers if there is noise coupling between the
switching regulator and the linear regulators. The noise
coupling can result in excessive switching ripple on the
linear regulator outputs. Slowing down the turn-on of
the gate drivers proves to be an effective way of reduc-
ing the output ripple. Take care to ensure that the turn-
off times are not affected at the same time. As
explained above, slowing down the turn-off times may
result in shoot-through problems. In Figure 1, a 10Ω
resistor (R5) is inserted in series with the BST pin to
slow down the turn-on of the high-side MOSFET (N1-B)
without affecting the turn-off. A 10Ω resistor (R6) is also
inserted between DL and the gate of the low-side MOS-
FET (N1-A) to slow its turn-on. Because the gate resis-
tor would slow down the turn-off time, connect a
switching diode (D2) (such as 1N4148) in parallel with
the gate resistor as shown in Figure 1 to prevent poten-
tial shoot-through.
High-Side Gate-Drive Supply (BST)
A flying-capacitor bootstrap circuit generates gate-
drive voltage for the high-side N-channel switch (Figure
1). The capacitor C5 between BST and LX is alternately
charged from the VL supply and placed parallel to the
high-side MOSFET’s gate-source terminals.
On startup, the synchronous rectifier (low-side MOS-
FET) forces LX to ground and charges the boost
capacitor from VL through diode D1. On the second
half-cycle, the switch-mode power supply turns on the
high-side MOSFET by closing an internal switch
between BST and DH. This provides the necessary
gate-to-source voltage to turn on the high-side switch,
an action that boosts the 5V gate-drive signal above
the input voltage.
Oscillator Frequency Selection (FREQ)
The FREQ pin can be used to select the switching fre-
quency of the step-down regulator. Connect FREQ to
VL for 500kHz operation. Connect FREQ to AGND for
250kHz operation. The 500kHz operation minimizes the
size of the inductor and capacitors. The 250kHz opera-
tion improves efficiency by 2% to 3%.
Linear Regulator Controllers
The MAX1530/MAX1531 include three positive linear
regulator controllers, LR1, LR2, and LR3. These linear
regulator controllers can be used with external pass
transistors to regulate supplies for TFT LCDs. The
MAX1531 includes an additional positive linear regula-
tor controller (LR4) and a negative linear regulator con-
troller (LR5).
Low-Voltage Logic Regulator Controller (LR1)
LR1 is an analog gain block with an open-drain N-
channel output. It drives an external PNP pass transis-
tor with a 6.8kΩ base-to-emitter resistor. Its guaranteed
base drive sink current is at least 3mA. The regulator
including transistor Q1 in Figure 1 uses a 10µF output
capacitor and is designed to deliver 500mA at 2.5V.
LR1 is typically used to generate low-voltage logic sup-
plies for the timing controller and the digital sections of
the TFT LCD source/gate driver ICs.
LR1 is enabled when the soft-start of the main step-
down regulator is complete. (See the Startup Sequence
(ONL_,SEQ) section.) Each time it is enabled, the con-
troller goes through a soft-start routine that ramps up its
internal reference DAC. (See the Soft-Start section.)
Gamma Regulator Controller (LR2)
LR2 is an analog gain block with an open-drain N-
channel output. It drives an external PNP pass transis-
tor with a 6.8kΩ base-to-emitter resistor. Its guaranteed
base drive sink current is at least 2mA. The regulator
including transistor Q2 in Figure 1 uses a 0.47µF output
capacitor and is designed to deliver 50mA at 9.7V.
______________________________________________________________________________________ 19