MAX14808 Datasheet, PDF (3/31 Pages) Maxim Integrated Products – Octal Three-Level/Quad Five-Level High-Voltage 2A Digital Pulsers with T/R Switch

MAX14808 / MAX14809
Octal Three-Level/Quad Five-Level High-Voltage
2A Digital Pulsers with T/R Switch
DC ELECTRICAL CHARACTERISTICS (continued)
(V_DD = +3V, V_CC = +5V, V_EE = -5V, V_PPA = +100V, V_NNA = -100V, V_PPB = +100V, V_NNB = -100V, 1FF bypass capacitor between
VGNA and VNNA, 1FF bypass capacitor between VGNB and VNNB, 1FF bypass capacitor between VGPA and VPPA, 1FF bypass
capacitor between VGPB and VPPB, V_{LDO_EN} = 0V, no load, unless otherwise noted. Typical values are at T_A = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Logic Input Leakage
(All Inputs Except LDO_EN)
I_IN
V_IN = 0V or V_DD
-1
0
+1
FA
LDO_EN Pulldown Resistance
R_{LDO_EN}
THP Low-Level Output Voltage
V_OL
Pullup resistor to V_DD (R_PULLUP = 1kI)
CLOCK INPUTS (CLK, CLK)—DIFFERENTIAL MODE
7
10
14
kI
0.1 x V_DD
V
Differential Clock Input Voltage
Range
V_CLKD
0.2
2
V_P-P
Common-Mode Voltage
Common-Mode Voltage Range
V_CLKCM
V_CL
V_CC/2
V
V_CC/2
- 0.45
V_CC/2
+ 0.45
V
Input Resistance
R_CLK,
R_CLK
Differential
Common mode
7
kI
23
kI
Input Capacitance
C_CLK,
C_CLK
Capacitance to GND (each input)
4
pF
CLOCK INPUTS (CLK, CLK)—SINGLE-ENDED MODE (V_CLK < 0.1V)
Low-Level Input
High-Level Input
Single-Ended Mode Selection
Threshold Low
V_IL
CLK
V_IH
CLK
V_IL
CLK
0.2 x V_DD
V
0.8 x V_DD
V
0.1
V
Single-Ended Mode Selection
Threshold High
V_IH
CLK
1
V
Input Capacitance (CLK)
C_CLK
Logic Input Leakage (CLK)
I_CLK
V_CLK = 0V or V_DD
Pullup Current (CLK)
I_CLK
V_CLK = 0V
SUPPLY CURRENT—SHUTDOWN MODE (MODE0 = Low, MODE1 = Low)
4
pF
-1
0
+1
FA
120 180
FA
V_DD Supply Current
I_DD
All inputs connected to GND or V_DD
V_CC Supply Current
I_CC
All inputs connected to GND or V_DD
V_EE Supply Current
I_EE
All inputs connected to GND or V_DD
V_{PP_} Supply Current
I_{PP_}
All inputs connected to GND or V_DD
V_{NN_} Supply Current
I_{NN_}
All inputs connected to GND or V_DD
SUPPLY CURRENT—DISABLE MODE (MODE0 = High, MODE1 = High)
3
FA
22
FA
13
FA
10
FA
10
FA
V_DD Supply Current
I_DDQ
All inputs
connected to
GND or V_DD
Transparent or single-
ended clock mode
Differential clock
mode, V_CLKD = 0.2V
1.7
3
FA
110 190
Maxim Integrated
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