MAX14808 Datasheet, PDF (22/31 Pages) Maxim Integrated Products – Octal Three-Level/Quad Five-Level High-Voltage 2A Digital Pulsers with T/R Switch

MAX14808 / MAX14809
Octal Three-Level/Quad Five-Level High-Voltage
2A Digital Pulsers with T/R Switch
Pin Description
PIN
MAX14808 MAX14809
1
—
2
—
3
—
4
—
—
1–4, 14–17
5
5
6
6
7
7
8
8
9
9
10
11
12
13
14
15
16
17
18, 33, 43,
53, 68
10
11
12
13
—
—
—
—
18, 33, 43,
53, 68
19, 67
19, 67
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
NAME
LVOUT1
LVOUT2
LVOUT3
LVOUT4
I.C.
LDO_EN
THP
SYNC
CLK
CLK
CC0
CC1
MODE0
MODE1
LVOUT5
LVOUT6
LVOUT7
LVOUT8
GND
V_DD
DINP5
DINN5
DINP6
DINN6
DINP7
DINN7
DINP8
DINN8
FUNCTION
Low-Voltage T/R Switch Output 1
Low-Voltage T/R Switch Output 2
Low-Voltage T/R Switch Output 3
Low-Voltage T/R Switch Output 4
Internally Connected. Connect I.C. to GND externally.
Internal Supply Generator Control Input. Drive LDO_EN high to disable the internal
power supply when using an external power supply on V_GPA, V_GPB, V_GNA, and
V_GNB. LDO_EN has an internal 10kI pulldown resistor to GND.
Open-Drain Thermal-Protection Output. THP asserts and sinks a 3mA current to GND
when the junction temperature exceeds +150NC.
CMOS Control Input. Drive SYNC high to enable clocked-input mode. Drive SYNC
low to operate in transparent mode (see the Truth Tables section).
CMOS Control Input. Clock positive phase input. Data inputs are clocked in at the
rising edge of CLK and CLK in differential clocked mode or at the rising edge of CLK
in single-ended clocked mode. Clock maximum frequency is 160MHz.
CMOS Control Input. Clock negative phase input. Data inputs are clocked in at the
edge of CLK and CLK in differential clocked mode. Clock maximum frequency is
160MHz. If CLK is connected to GND, the CLK input is a single-ended logic-level
clock input. Otherwise, CLK and CLK are self-biased differential clock inputs.
Current Control Input. Control current capability (see the Truth Tables section).
Current Control Input. Control current capability (see the Truth Tables section).
Mode Control Input. Control operation mode (see the Truth Tables section).
Mode Control Input. Control operation mode (see the Truth Tables section).
Low-Voltage T/R Switch Output 5
Low-Voltage T/R Switch Output 6
Low-Voltage T/R Switch Output 7
Low-Voltage T/R Switch Output 8
Ground
Logic Supply Voltage. Bypass V_DD (both pins) to GND with a 0.1FF capacitor as
close as possible to the device.
Digital Signal Positive Input 5 (see the Truth Tables section)
Digital Signal Negative Input 5 (see the Truth Tables section)
Digital Signal Positive Input 6 (see the Truth Tables section)
Digital Signal Negative Input 6 (see the Truth Tables section)
Digital Signal Positive Input 7 (see the Truth Tables section)
Digital Signal Negative Input 7 (see the Truth Tables section)
Digital Signal Positive Input 8 (see the Truth Tables section)
Digital Signal Negative Input 8 (see the Truth Tables section)
Maxim Integrated
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