MAX1246_07 Datasheet, PDF (3/25 Pages) Maxim Integrated Products – 2.7V, Low-Power, 4-Channel, Serial 12-Bit ADCs in QSOP-16

+2.7V, Low-Power, 4-Channel,
Serial 12-Bit ADCs in QSOP-16
ELECTRICAL CHARACTERISTICS (continued)
(V_DD = +2.7V to +3.6V (MAX1246); V_DD = +2.7V to +5.25V (MAX1247); COM = 0V; f_SCLK = 2.0MHz; external clock (50% duty cycle);
15 clocks/conversion cycle (133ksps); MAX1246—4.7µF capacitor at VREF pin; MAX1247—external reference, VREF = 2.5V applied
to VREF pin; T_A = T_MIN to T_MAX; unless otherwise noted.)
PARAMETER
CONVERSION RATE
Conversion Time (Note 5)
SYMBOL
CONDITIONS
t_CONV
Internal clock, SHDN = FLOAT
Internal clock, SHDN = V_DD
External clock = 2MHz, 12 clocks/
conversion
MIN TYP MAX UNITS
5.5
7.5
35
65
µs
6
Track/Hold Acquisition Time
t_ACQ
Aperture Delay
Aperture Jitter
Internal Clock Frequency
SHDN = FLOAT
SHDN = V_DD
External Clock Frequency
Data transfer only
ANALOG/COM INPUTS
Input Voltage Range, Single-
Ended and Differential (Note 6)
Unipolar, COM = 0V
Bipolar, COM = VREF / 2
Multiplexer Leakage Current
On/off leakage current, V_CH_ = 0V or V_DD
Input Capacitance
INTERNAL REFERENCE (MAX1246 only, reference buffer enabled)
VREF Output Voltage
VREF Short-Circuit Current
VREF Temperature Coefficient
T_A = +25°C
MAX1246_C
MAX1246_E
MAX1246_M
Load Regulation (Note 8)
0mA to 0.2mA output load
Capacitive Bypass at VREF
Internal compensation mode
External compensation mode
Capacitive Bypass at REFADJ
REFADJ Adjustment Range
V_BST = V_LX = V_IN = 28V, V_FB = 1.5V
EXTERNAL REFERENCE AT VREF (Buffer disabled)
VREF Input Voltage Range
(Note 9)
VREF Input Current
VREF Input Resistance
Shutdown VREF Input Current
VREF = 2.5V
REFADJ Buffer Disable
Threshold
1.5
30
<50
1.8
0.225
0.1
2.0
0
2.0
µs
ns
ps
MHz
MHz
0 to VREF
V
±VREF / 2
±0.01 ±1
µA
16
pF
2.480
0
4.7
0.047
2.500
±30
±30
±30
±0.35
±1.5
2.520
30
±50
±60
±80
V
mA
ppm/°C
mV
µF
µF
%
1.0
VDD +
50mV
V
100 150
V
18
25
kΩ
0.01 100
µA
VDD -
0.5
V
_______________________________________________________________________________________ 3