MAX1242 Datasheet, PDF (3/12 Pages) Maxim Integrated Products – +2.7V to %.25V, Low-Power, 10-Bit Serial ADCs in SO-8

+2.7V to +5.25V, Low-Power, 10-Bit
Serial ADCs in SO-8
ELECTRICAL CHARACTERISTICS (continued)
(V_DD = +2.7V to +5.25V; 73ksps; f_SCLK = 2.1MHz (50% duty cycle); MAX1242—4.7µF capacitor at REF pin, MAX1243—external
reference; V_REF = 2.5V applied to REF pin; T_A = T_MIN to T_MAX; unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
INTERNAL REFERENCE (MAX1242 only)
REF Output Voltage
REF Short-Circuit Current
T_A = +25°C (Note 4)
2.470 2.500 2.530
V
30
mA
REF Temperature Coefficient
MAX1242
±30
ppm/°C
Load Regulation (Note 5)
0mA to 0.2mA output load
0.35
mV
Capacitive Bypass at REF
4.7
µF
EXTERNAL REFERENCE (VREF = 2.5V)
Input Voltage Range
1.00
V_DD +
50mV
V
Input Current
Input Resistance
REF Input Current in Shutdown
Capacitive Bypass at REF
SHDN = 0V
100
150
µA
18
25
kΩ
±0.01 10
µA
0.1
µF
DIGITAL INPUTS: SCLK, CS, SHDN
SCLK, CS Input High Voltage
V_IH
SCLK, CS Input Low Voltage
SCLK, CS Input Hysteresis
SCLK, CS Input Leakage
SCLK, CS Input Capacitance
SHDN Input High Voltage
SHDN Input Low Voltage
SHDN Input Current
SHDN Input Mid Voltage
SHDN Voltage, Floating
SHDN Max Allowed Leakage,
Mid Input
V_IL
V_HYST
I_IN
C_IN
V_SH
V_SL
V_SM
V_FLT
V_DD ≤ 3.6V
V_DD > 3.6V
V_IN = 0V or V_DD
(Note 6)
SHDN = 0V or V_DD
SHDN = float
SHDN = float
2.0
V
3.0
0.8
V
0.2
V
±0.01 ±1
µA
15
pF
V_DD - 0.4
V
0.4
V
±4.0
µA
1.1
V_DD - 1.1
V
V_DD / 2
V
±100
nA
DIGITAL OUTPUT: DOUT
Output Voltage Low
Output Voltage High
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
V_OL
V_OH
I_L
C_OUT
I_SINK = 5MA
I_SINK = 16mA
I_SOURCE = 0.5mA
CS = V_DD
CS = V_DD (Note 6)
0.4
V
0.8
V_DD - 0.5
V
±0.01 ±10
µA
15
pF
Supply Voltage
V_DD
2.7
5.25
V
Supply Current
Operating mode (MAX1242) ^{VDD = 3.6V}
Operating mode (MAX1242) V_DD = 5.25V
I_DD
Operating mode (MAX1243) ^{VDD = 3.6V}
V_DD = 5.25V
1.4
2.0
1.8
3.0
mA
0.9
1.5
1.6
2.5
Power-down
V_DD = 3.6V
V_DD = 5.25V
1.9
10
µA
3.5
15
Power-Supply Rejection (Note 7) PSR V_DD = V_DD(min) to V_DD(max), full-scale input
±0.3
mV
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