MAX11102_11 Datasheet, PDF (25/30 Pages) Maxim Integrated Products – 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs 2.2V to 3.6V Supply Voltage

2Msps/3Msps, Low-Power,
Serial 12-/10-/8-Bit ADCs
Supply Current vs. Sampling Rate
For applications requiring lower throughput rates, the
user can reduce the clock frequency (fSCLK) to lower the
sample rate. Figure 11 shows the typical supply current
(IVDD) as a function of sample rate (fS) for the 3Msps
devices. The part operates in normal mode and is never
powered down. Figure 13 pertains to the 2Msps devices.
The user can also power down the ADC between con-
versions by using the power-down mode. Figure 12
shows for the 3Msps device that as the sample rate is
reduced, the device remains in the power-down state
longer and the average supply current (IVDD) drops
accordingly. Figure 14 pertains to the 2Msps devices.
5
VDD = 3V
f_SCLK = VARIABLE
4 _{16 CYCLES/CONVERSION}
3
2
1
0
0 500 1000 1500 2000 2500 3000
fS (ksps)
Figure 11. Supply Current vs. Sample Rate (Normal Operating
Mode, 3Msps Devices)
4
VDD = 3V
f_SCLK = VARIABLE
3 ^{16 CYCLES/CONVERSION}
2
1
0
0
500
1000
1500
2000
f_S (ksps)
Figure 13. Supply Current vs. Sample Rate (Normal Operating
Mode, 2Msps Devices)
3.0
VDD = 3V
f_SCLK = 48MHz
2.5
2.0
1.5
1.0
0.5
0
0
200 400 600 800 1000
fS (ksps)
Figure 12. Supply Current vs. Sample Rate (Device Powered
Down Between Conversions, 3Msps Devices)
2.0
VDD = 3V
f_SCLK = 32MHz
1.5
1.0
0.5
0
0
100 200 300 400 500
fS (ksps)
Figure 14. Supply Current vs. Sample Rate (Device Powered
Down Between Conversions, 2Msps Devices)
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