MAX14912 Datasheet, PDF (24/30 Pages) Maxim Integrated Products – Low Power and Heat Dissipation

MAX14912/MAX14913
Octal High-Speed, High-Side
Switch/Push-Pull Driver
Command Mode SPI
CMND = High
In serial setting mode (SRIAL = high), command SPI
mode allows setting, configuration and monitoring. In
parallel setting mode (SRIAL = low) command mode
allows monitoring. While the MAX14912 supports SPI
configuration in parallel mode, configuration is not
supported in the MAX14913. In command mode, the input
is always a command + data word; pins CNFG, S16, and
OL are ignored. The output word returns the information
requested during the previous SPI cycle.
Table 7 lists the registers accessible in command mode,
while Table 8 lists the commands and their effect.
In command mode, a latched version of all faults is available.
In other words, the device keeps any fault in memory until
the user decides to clear the fault registers. Each bit of
fault registers 4, 5, and 6 is set as soon as its corresponding
real-time fault signal goes high. At the end of any SPI
cycle during which the SDI MSB (the Z bit) has been set
to 1, all fault registers are cleared at once (see Table 8).
If [SRIAL = high and CMND = high], the global FAULT
signal is latched as well (see Table 9 for more details
on the global FAULT signal). Otherwise, it is a real-time
global fault status.
In command mode, both the latched and the real-time
faults can be read out. All commands except #4 returns
the same real-time data as in the 16-bit mode. Command
#4 can be used to read any register and, for fault registers
4, 5, and 6, it returns both the latched and real-time value
of any fault signal.
Table 7. SPI REGISTERS (Accessible Only in COMMAND Mode)
REG R/W
PURPOSE
7
6
5
4
3
Switch/Driver Settings
0 R/W
(Note 10)
IN8
IN7
IN6
IN5
IN4
Default
0
0
0
0
0
Push-Pull/High-Side
1 R/W ^{Configuration (Note 11)}
PP8
PP7
PP6
PP5
PP4
Default
0
0
0
0
0
2 R/W
Open Load Detect
Enable (Note 11)
Default
OL_EN8 OL_EN7 OL_EN6 OL_EN5 OL_EN4
0
0
0
0
0
Watchdog Config. And
Channel Paralleling
—
—
—
—
joinUP
3 R/W
(Note 11)
Default
0
0
0
0
0
4
R
Per-Channel Open-Load
Condition
OL8*
OL7*
OL6*
OL5*
OL4*
2
IN3
0
PP3
0
OL_EN3
0
joinDW
0
OL3*
1
IN2
0
PP2
0
OL_EN2
0
WD1
0
OL2*
0
IN1
0
PP1
0
OL_EN1
0
WD0
0
OL1*
5
R
Per-Channel Thermal
Shutdown
THSD8* THSD7* THSD6* THSD5* THSD4* THSD3* THSD2* THSD1*
6
R
Global Faults
WDfault
CRCfault
DCDC
Current-
Limit
8CKmult
Error*
THSDglob* 5V UVLO
V_DD
UVLO
V_DD
WARN
7
R
OUT Overvoltage
Detection
(Note 9)
OV8
OV7
OV6
OV5
OV4
OV3
OV2
OV1
Note 9: Bits are set when the OUT_ voltage is higher than V_DD. These bits are real-time.
Note 10: Register 0 can be written to, but will not change the output states in Parallel (SRIAL = low) setting mode, since the outputs
are then only set through the IN_ pins.
Note 11: Registers 1, 2, 3 can be written to in the MAX14913, but will not change the configuration in Parallel (SRIAL = low) setting mode.
* Faults are stretched in time to a minimum duration of 200ms.
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