English
Language : 

DS26514_11 Datasheet, PDF (226/305 Pages) Maxim Integrated Products – 4-Port T1/E1/J1 Transceiver Fully Internal Impedance Match, No External Resistor
DS26514 4-Port T1/E1/J1 Transceiver
Register Name:
Register Description:
Register Address:
TLS2
Transmit Latched Status Register 2 (HDLC-64)
191h + (200h x (n - 1)) : where n = 1 to 4
Bit #
7
6
5
4
Name
—
—
—
TFDLE
—
—
—
—
Default
0
0
0
0
Note: All bits in this register are latched and can create interrupts.
3
TUDR
TUDR
0
2
TMEND
TMEND
0
1
TLWMS
TLWMS
0
0
TNFS
TNFS
0
Bit 4: Transmit FDL Register Empty (TFDLE) (T1 Mode Only). Set when the TFDL register has shifted out all 8
bits. Useful if the user wants to manually use the TFDL register to send messages, instead of using the HDLC or
BOC controller circuits.
Bit 3: Transmit FIFO Underrun Event (TUDR). Set when the transmit FIFO empties out without having seen the
TMEND bit set. An abort is automatically sent.
Bit 2: Transmit Message End Event (TMEND). Set when the transmit HDLC-64 controller has finished sending a
message.
Bit 1: Transmit FIFO Below Low Watermark Set Condition (TLWMS). Set when the transmit 64-byte FIFO
empties beyond the low watermark as defined by the transmit low watermark bits (TLWM), rising edge detect of
TLWM.
Bit 0: Transmit FIFO Not Full Set Condition (TNFS). Set when the transmit 64-byte FIFO has at least one empty
byte available for write. Rising edge detect of TNF. Indicates change of state from full to not full.
Register Name:
Register Description:
Register Address:
TLS3
Transmit Latched Status Register 3 (Synchronizer)
192h + (200h x (n - 1)) : where n = 1 to 4
Bit #
7
6
5
4
3
Name
—
—
—
—
—
Default
0
0
0
0
0
Note: Some bits in this register are latched and can create interrupts.
2
1
0
—
LOF
LOFD
0
0
0
Bit 1: Loss of Frame (LOF). A real-time bit that indicates that the transmit synchronizer is searching for the sync
pattern in the incoming data stream.
Bit 0: Loss Of Frame Synchronization Detect (LOFD). This latched bit is set when the transmit synchronizer is
searching for the sync pattern in the incoming data stream.
19-5856; Rev 4; 5/11
226 of 305