MAX1632AEAI Datasheet, PDF (22/29 Pages) Maxim Integrated Products – Multi-Output, Low-Noise Power-Supply Controllers for Notebook Computers

Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
Table 5. Low-Voltage Troubleshooting Chart
SYMPTOM
CONDITION
Sag or droop in V_OUT under Low V_IN-V_OUT
step-load change
differential, <1.5V
Dropout voltage is too high
(V_OUT follows V_IN as V_IN
decreases)
Low V_IN-V_OUT
differential, <1V
ROOT CAUSE
Limited inductor-current
slew rate per cycle.
Maximum duty-cycle limits
exceeded.
SOLUTION
Increase bulk output capacitance
per formula (see the Low-Voltage
Operation section). Reduce inductor
value.
Reduce operation to 200kHz.
Reduce MOSFET on-resistance and
coil DCR.
Unstable—jitters between
different duty factors and
frequencies
Low V_IN-V_OUT
differential, <0.5V
Normal function of internal
low-dropout circuitry.
Increase the minimum input voltage
or ignore.
Secondary output won’t
support a load
Low V_IN-V_OUT
differential,
V_IN < 1.3 x V_OUT (main)
Not enough duty cycle left to
initiate forward-mode opera-
tion. Small AC current in
primary cannot store energy
for flyback operation.
Reduce operation to 200kHz.
Reduce secondary impedances;
use a Schottky diode, if possible.
Stack secondary winding on the
main output.
Poor efficiency
Low input voltage, <5V
VL linear regulator is going
into dropout and is not pro-
viding good gate-drive levels.
Use a small 20mA Schottky diode
for boost diode D2. Supply VL from
an external source.
Does not start under load or
quits before battery is
completely dead
Low input voltage, <4.5V
VL output is so low that it hits
the VL UVLO threshold.
Supply VL from an external source
other than V_IN, such as the system
+5V supply.
________________Applications Information
Heavy-Load Efficiency Considerations
The major efficiency-loss mechanisms under loads are,
in the usual order of importance:
• P(I²R) = I²R losses
• P(tran) = transition losses
• P(gate) = gate-charge losses
• P(diode) = diode-conduction losses
• P(cap) = capacitor ESR losses
• P(IC) = losses due to the IC’s operating supply
current
Inductor core losses are fairly low at heavy loads
because the inductor’s AC current component is small.
Therefore, they are not accounted for in this analysis.
Ferrite cores are preferred, especially at 300kHz, but
powdered cores, such as Kool-Mu, can work well:
Efficiency = P_OUT / P_IN x 100%
= P_OUT / (P_OUT + P_TOTAL ) x 100%
P_TOTAL = P(I²R) + P(tran) + P(gate) +
P(diode) + P(cap) + P(IC)
P = (I²R) = (I_LOAD)² x (R_DC + R_DS(ON) + R_SENSE)
where R_DC is the DC resistance of the coil, R_DS(ON) is
the MOSFET on-resistance, and R_SENSE is the current-
sense resistor value. The R_DS(ON) term assumes identi-
cal MOSFETs for the high-side and low-side switches,
because they time-share the inductor current. If the
MOSFETs are not identical, their losses can be estimat-
ed by averaging the losses according to duty factor:
PD(tran) = transition loss = V_IN x I_LOAD x f x
3
2
x
[ ] ^(VIN ^{x C}RSS ^{/ I}GATE^{) + 20ns}
where C_RSS is the reverse transfer capacitance of the
high-side MOSFET (a data-sheet parameter), I_GATE is the
DH gate-driver peak output current (1.5A typ), and 20ns
is the rise/fall time of the DH driver (20ns typ):
P(gate) = qG x f x VL
where VL is the internal-logic-supply voltage (+5V), and qG
is the sum of the gate-charge values for low-side and high-
side switches. For matched MOSFETs, qG is twice the
data-sheet value of an individual MOSFET. If V_OUT is set to
less than 4.5V, replace VL in this equation with V_BATT. In
this case, efficiency can be improved by connecting VL to
an efficient 5V source, such as the system +5V supply:
P(diode) = diode - conduction losses
= I_LOAD x V_FWD x t_D x f
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